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Technical Lead - AI and Computing Systems

Job in Zürich, 8058, Zurich, Kanton Zürich, Switzerland
Listing for: Huawei Switzerland
Full Time position
Listed on 2026-04-29
Job specializations:
  • IT/Tech
    Systems Engineer, AI Engineer (Applied/Software), Data Scientist, Computer Science
  • Engineering
    Systems Engineer, AI Engineer (Applied/Software), Computer Science
Salary/Wage Range or Industry Benchmark: 100000 - 125000 CHF Yearly CHF 100000.00 125000.00 YEAR
Job Description & How to Apply Below
Location: Zürich

Technical Lead (m/f/d)

We are looking for an exceptional Technical Lead to drive innovation and technical breakthroughs in our Computing Systems Lab in Zurich. This role focuses on shaping the future of computing architectures, designing advanced computing frameworks, and developing high‑impact techniques for emerging AI workloads.

Responsibilities
  • Technical Leadership: Lead the technical direction for next‑generation computing architectures, including AI accelerators and general‑purpose processors. Identify key research problems, anticipate technological trends, and guide the lab in exploring novel approaches that deliver superior computing system efficiency, scalability, resilience, and cost‑effectiveness.
  • Innovation & Breakthroughs: Drive development of cutting‑edge techniques in architecture design and performance analysis. Lead rapid workload modeling and computational mapping on specific hardware architectures, develop toolkits facilitating decision‑making on design alternatives, and advance supporting technologies such as programming models, compilation frameworks, heuristic algorithms, and more. Enhance professional impact in chip micro‑architecture design, including techniques for design‑space exploration, performance simulation, wafer‑scale, interconnection, 3D packaging, thermal dissipation, reliability and redundancy design.
  • Problem Solving & Strategy: Prioritize technical challenges based on their potential impact on computing system performance and competitiveness. Develop strategies to achieve breakthrough solutions and ensure their practical feasibility and scalability.
  • Collaboration & Influence: Act as a technical authority within the lab, articulating innovative ideas clearly in internal discussions, technical meetings, and conferences. Collaborate closely with HQ R&D teams and external partners to share insights, validate approaches, and influence the broader architecture roadmap.
  • Research & Knowledge Advancement: Stay at the forefront of global research trends. Proactively identify emerging opportunities, incorporate best practices, and generate high‑impact technical results, including innovative prototypes, influential publications, and valuable patents.
  • External Engagement: Build technical collaborations with academic institutions, industry partners, and research communities. Represent the lab in the wider scientific and technical community to showcase thought leadership in computing architectures.
Requirements
  • PhD in Computer Science, Electrical Engineering, or a related field.
  • Proven track record in advanced computing architecture and system, especially for AI scenarios.
  • Technical expert from industry or academia with at least 5 years of experience in research and development within the field of computing architecture.
  • Demonstrated ability to innovate, identify key technical challenges, and achieve breakthroughs.
  • Strong experience with AI technologies, particularly in the areas of LLM, foundation models, multimodal, spatial intelligence, and other wider spectrum of computing applications such as HPC, graphics & rendering, cryptographic, quantum computing, etc.
  • Exceptional publication record in peer‑reviewed journals and conferences (h‑index ≥ 30) and/or highly valuable patents in relevant fields.
  • Excellent communication and collaboration skills to interact effectively with stakeholders at all levels.
Preferred Qualifications
  • Experience with exploration and design of advanced micro‑architecture, SoC, hardware platform, and memory systems.
  • Proficiency in workload analysis & mapping and software‑hardware codesign.
  • Knowledge of important topics of chip design and manufacture involving process, package, and related areas.
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