Senior ASIC Chip Lead: Drive Architecture & Tapeout
Listed on 2026-10-07
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Engineering
Hardware Engineer, Electronics Engineer -
Design & Architecture
Teradyne is seeking an experienced Senior ASIC Chip Lead / Project Lead to drive development and delivery of a large-scale mixed-signal ASIC for next-gen Automated Test Equipment (ATE) systems.
The role requires leadership across architecture, analog/digital design, verification, and manufacturing, coordinating internal teams and external partners to meet technical, schedule, cost, and quality goals.
We would love to welcome a new Senior ASIC Chip Lead:
Drive Architecture & Tapeout to our group in Agoura Hills, CA, United States.
Our team is growing, and we are hiring a Senior ASIC Chip Lead:
Drive Architecture & Tapeout in Agoura Hills, CA, United States.
This opening is for the Senior ASIC Chip Lead:
Drive Architecture & Tapeout role at LitePoint.
We are seeking a motivated Senior ASIC Chip Lead:
Drive Architecture & Tapeout to join LitePoint in Agoura Hills, CA, United States.
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