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Infrastructure & Technology Semiconductor Design Enablement - Testsite Coordinator Professional

Job in City of Albany, Albany, Albany County, New York, 12201, USA
Listing for: IBM
Full Time position
Listed on 2026-06-18
Job specializations:
  • Engineering
    Systems Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 120000 USD Yearly USD 80000.00 120000.00 YEAR
Job Description & How to Apply Below
Position: Infrastructure & Technology Semiconductor Design Enablement - Testsite Coordinator Professional[...]
Location: City of Albany

Job Overview

We are seeking a test chip design enablement engineer who can work in a highly multi-disciplinary, multi-cultural environment to support IBM research and development activities in semiconductor and/or superconducting circuit technology, focusing on test chip enablement and hardware program management. This role will be responsible for multiple aspects of design & tapeout activities, including technical coordination, planning, and execution milestones from design conception to final test, as well as development and execution of data processing scripts and algorithms, tape‑out operations, logistics, automated design services, and fabrication integration.

Responsibilities
  • Drive end‑to‑end tech chip development and tape‑out activities, including project scope definition, schedule/milestone development, dependency identification, progress tracking, issue resolution, and communication of status and priorities.
  • Collaborate across diverse teams (technology development, process integration, patterning, metrology, design & enablement) to deliver test chips that meet technology development and customer requirements.
  • Review design data at multiple stages of test chip development, manage change control for design updates, and handle reticle ordering.
  • Coordinate design & waiver reviews to disposition design errors that may impact fabrication quality.
  • Support data preparation and mask release activities, including handling of design data manipulation steps or scripts.
  • Develop scripts and/or Python code to support test chip development flow and design data manipulations.
  • Identify and drive opportunities for operational and quality improvements.
Required Education

Bachelor's Degree

Preferred Education

Master's Degree

Required Technical and Professional Expertise
  • Bachelor or above in Electrical Engineering, Computer Engineering, Physics Engineering or related field with experience in VLSI chip development or semiconductor technology.
  • Basic understanding of physical layout, technology ground rules, and semiconductor processing.
  • Familiarity with layout verification tools from Cadence Pegasus, Synopsys ICV, or Siemens Calibre, including design rule checking (DRC) with at least 2 years of relevant experience.
  • Strong understanding of Linux environments and shell scripting, with a minimum of 2 years experience.
  • Ability to independently troubleshoot and solve complex problems.
  • Strong communication and interpersonal skills; ability to work collaboratively and effectively within a team.
Preferred Technical and Professional Experience
  • Experience with Program Management.
  • Experience with semiconductor technology test chip development and mask preparation activities.
  • Experience with version control systems such as Git and familiarity with collaborative software development workflows (e.g. Git Hub, Bitbucket).
  • Experienced user of Synopsys ICV DRC checking tool.
  • Experience with advanced sub‑micron semiconductor technology nodes.
  • Experience with Python or other scripting/programming languages (e.g. Perl), at least 2 years.
Benefits
  • Healthcare benefits including medical, prescription drug coverage, dental, vision, and mental health & well‑being.
  • Financial programs such as 401(k), cash balance pension plan, IBM Employee Stock Purchase Plan, financial counseling, life insurance, short & long‑term disability coverage, and performance‑based salary incentive programs.
  • Generous paid time off: 12 holidays, minimum 56 hours sick time, 120 hours vacation, 12 weeks parental bonding leave in accordance with IBM Policy, and Paid Care Leave programs.
  • Training and educational resources on a personalized, AI‑driven learning platform to grow skills and obtain industry‑recognized certifications.
  • Diverse and inclusive employee resource groups, giving & volunteer opportunities, and discounts on retail products, services & experiences.
EEO Statement

IBM is proud to be an equal‑opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, gender, gender identity or expression, sexual orientation, national origin, genetics, pregnancy, disability, neurodivergence, age, or other characteristics protected by the applicable law. IBM is also committed to compliance with all fair employment practices regarding citizenship and immigration status.

Additional

Information

We consider qualified applicants with criminal histories, consistent with applicable law.

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