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Chip Implementation CAD Engineer; Digital Reference flow development

Job in City of Albany, Albany, Albany County, New York, 12201, USA
Listing for: Rapidus Corporation US
Full Time position
Listed on 2026-07-27
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer, AI Engineer (Applied/Software)
Salary/Wage Range or Industry Benchmark: 120000 - 190000 USD Yearly USD 120000.00 190000.00 YEAR
Job Description & How to Apply Below
Position: Chip Implementation CAD Engineer (Digital Reference flow development)
Location: City of Albany

Chip Implementation CAD Engineer (Digital Reference flow development)

Team:
Enablement

Location:

Albany (NY)--preferred, Santa Clara (CA), or Tokyo (Japan)

Role Overview:

You will focus on the implementation stages (Synthesis and PnR) of the digital reference flow. Additionally, you will lead the adoption of next-generation automation tools, including AI/ML-driven DSE (Design space exploration)

About Rapidus

Rapidus Corporation, founded in 2022, is Japan-led initiative to build a world-class advanced logic semiconductor foundry. With a bold vision to accelerate innovation, we are pioneering cutting-edge logic semiconductor research, development, design, and manufacturing to transform the global semiconductor industry.

Why Join Us

You will play a central leadership role in building the world’s most advanced 2nm and next

generation enablement ecosystem
, shaping the foundation for future semiconductor innovation.

You will focus on the implementation stages (Synthesis and PnR) of the digital reference flow. Additionally, you will lead the adoption of next-generation automation tools, including AI/ML-driven DSE (Design space exploration)

Key Responsibilities:

  • Develop and verify implementation steps (Synthesis/PnR) of the reference flow.
  • Evaluate and productize AI/ML-driven Design Space Exploration (DSE) tools.
  • Partner with EDA vendors to integrate the latest features and work with design contractors to streamline implementation methodologies.
  • Author technical documentation and provide expert customer support.

Qualifications:

  • Experience in logic synthesis and APR (Automatic Place and Route) flows.
  • Experience with advanced process nodes (7nm FinFET and beyond) is preferred but not mandatory.
  • Comprehensive Health, Dental and Vision coverage, fully at company's expense (no deductibles), 401k with no employer match
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