ASIC Design Verification Technical Leader

Design Verification Lead

Cisco's Client Optics Group (COG) designs & delivers the high-speed optical transceivers, and platforms that power Cisco's core data center networking solutions. We specialize in the design and integration of innovative IM/DD optics and silicon photonic platforms that enable customers to deploy industry-leading optical technologies within data center with unprecedented speed, capacity, and reliability. Come join us and take part in shaping COG's ground-breaking optical solutions by designing, developing, and testing some of the most advanced pluggable, and Co-packaged Optics (CPO) being developed in the industry.

You will work with Cisco's best-in-class Silicon Photonics team. Our team is responsible for driving the development and optimization of optical transceivers & modules (800G,1.6T & beyond) that seamlessly integrate with Cisco's routing, switching, and datacenter platforms, enabling customers to build scalable, high-performance networks that support emerging technologies including AI/ML workloads, and next-generation data center architectures.

We are looking for a hard-working and experienced Design Verification Lead to join our team and drive verification of Cisco's silicon photonics driver integrated circuits for the next generation of products for 100/200/400G per Lambda solutions.

• Define and lead verification methodology and standards across multiple projects, coordinating activities across multiple sites.
• Lead verification at block & chip level with various high-speed IPs integrated like ODSP, D2D IP, Ser Des XSR/PAM4, Integrated drivers/TIA, and control functions.
• Review specifications, participate in design reviews, and influence architecture for testability and verification efficiency.
• Mentor and coach verification engineers, driving continuous improvement in technical skills and execution.
• Debug complex silicon and system-level issues during bring-up phases.
• Support post-silicon bring-up and optimize integration and performance.

• Bachelor's degree in Electrical or Computer engineering and 8+ years of ASIC Design Verification experience, or Master's degree in Electrical Engineering or Computer Engineering and 6+ years of ASIC Design experience, or PhD in Electrical Engineering or Computer Engineering + 3 years in ASIC Design Verification experience.
• Experience in System Verilog, UVM, and verification methodologies
• Experience owning and delivering verification for large-scale SoCs or subsystems.
• Experience leading verification teams or projects.
• Experience in scripting and automation such as Python, Perl, TCL, or Shell Scripts.

• Strong experience with UVM (Universal Verification Methodology) for developing scalable, reusable, and coverage-driven verification environments.
• Expertise in verification of Ser Des IP, D2D PHY IP, ODSP & integrated transceiver features, CPU sub-system & Protocols (Ethernet, UCIE, UAL, SPI/I2C, etc.)
• Experience influencing design for testability and verification.
• Proven experience in troubleshooting and debugging.
• · Experience with Formal Verification, hardware description languages (HDLs) such as Verilog/System Verilog)
• Experience with emulation and prototyping platforms (Veloce, HAPS).
• Experience collaborating with architecture and design teams on verification strategy.