Regional Graduate Program - Engineer Verification and Validation

#We Are In  to create tiny chips and big careers.

Trade your textbooks for tools to innovate.

Let’s shape your next step together.

Whether through our Graduate Programs or yourfirst full-time role, Infineon gives you the tools, trust and challenges togrow fast and go far.

We are searching for a talented individual with a good understanding of analog circuit design to drive the analog behavioral modeling role and to become an integral part of the Infineon R&D team. The successful candidate will join a dynamic team of designers, chip architects, and systems engineers to develop leading-edge high-performance power management solutions for the computing market.

• Methodology
  : Develop new strategies that leverage AI to aid in the improvement of the verification flow and translates to faster iteration cycles, better coverage testing, higher quality documentation, and overall product successes
• Modeling:
  Generate Verilog-AMS and System Verilog behavioral models and correlate results with schematic-level performance using targeted test benches
• Testbench:
  Develop mixed-signal simulation workbenches in Cadence ADE Explorer and Xcelium and automate regression runs
• Schematic/Netlist:
  Create schematics, produce schematic netlists for simulation, and maintain hierarchy configurations for tool flows
• Verification:
  Verify device-level and system-level requirements through simulation, interpreting results and documenting discrepancies
• DFT/Testability:
  Contribute to verification of DFT plans, digital scan support, ATE preparation, and bench testability assessments
• Debugging:
  Debug analog and digital integration issues and drive resolution with design and test teams
• Collaboration:
  
  Coordinate with design, test, and production teams to support pre-silicon verification and production IC validation
• Rotation travel:
  Participate in training rotations across 2–4 divisions, work with multiple managers, and travel to various U.S. locations as needed for a two year period
• Presentations:
  Create and present progress PowerPoint updates for the program, product demonstrations (if applicable) for internal and external teams as needed
• Mentoring:
  Mentor future RGP members during your last year as a RGP (roughly 1 hour per month during active mentoring periods)

The successful candidate will need to be a very organized and detail-oriented individual. This person must also be highly motivated, innovative, and capable of carrying out tasks to a successful conclusion.

• Education:
  
  BSEE, BSME, or equivalent with 1+ years of relevant verification experience
• Tools:
  Proficient with Cadence Virtuoso, ADE Explorer, Xcelium, and Spectre simulation flows
• Modeling:
  Experienced in Verilog-AMS/System Verilog and AMS behavioral modeling practices
• Scripting:
  Comfortable scripting in Python, and/or C/C++ for automation and data parsing
• Environment:
  Familiar with Unix/Linux command line, editors, and version control systems
• Soft Skills:
  
  Strong debugging skills, effective cross-functional communication, and ability to work independently and in teams
• Processes:
  Experience using bug tracking systems and maintaining reproducible simulation regressions
• Mobility:
  Willingness to travel ~20% for the RGP role for a two year period, then return to either Andover MA, Raleigh NC, or Austin TX at the end of the program

Infineon Technologies is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), gender identity, national origin, ancestry, citizenship, age, physical or mental disability, legally protected medical condition, family care status, military or veteran status, marital status, domestic partner status, sexual orientation, or any other basis protected by local, state, or federal laws.

Employment at Infineon is contingent upon proof of your legal right to work in the United States under applicable law, verification of satisfactory references, successful completion of a background check and drug test,…