Consulting

Description

The EW Division of Leidos is looking for a Consulting Employee to support FPGA DSP Firmware Design Engineering work with a multi‑disciplined design team (electrical engineers, systems engineers, scientists, etc.) to design, develop, simulate, and integrate challenging DSP FPGA designs and RF sensor systems based on given project requirements. Candidates will have a strong background in Digital Signal Processing (DSP) algorithms and their implementation in MATLAB and FPGAs to support a fast‑paced, multi‑disciplinary design team.

This role will also support integration, test, and verification in the final products. The position is expected to be part‑time and can support telecommuting options.

• Analyze, design, simulate, and implement algorithms in hardware description languages (VHDL, Verilog) based on customer requirements and/or MATLAB models.
• Collaborate with a multi‑disciplined design team to design and integrate challenging DSP FPGA designs and RF sensor systems.
• Collaborate with a multi‑disciplined design team to design and integrate DSP applications for latest System on a Chip (SoC) implementations such as Xilinx Zynq Ultrascale+, Intel Stratix‑10, and Xilinx RFSoC.
• Analyze, design, and implement HDL test benches for code validation and comparison against models.
• Perform design constraints generation, verification, and evaluate synthesis and timing performance reports.
• Implement and validate signal processing concepts such as FFTs, channelize rs, digital filters, digital modulation, digital down/up‑conversion, adaptive processing, etc., into new or existing modular HDL designs.
• Analyze, design, simulate, and implement designs that interface with common signaling standards and typical IP hard macros such as SERDES, PLLs, etc., and/or protocols such as PCIe, JESD
  204B, LVDS, etc.
• Analyze schematic diagrams for custom or commercial‑off‑the‑shelf (COTS) electronic hardware involving high‑speed digital and/or analog circuitry in FPGA‑centric systems.
• Develop and maintain requirements documents, functional specification documents, interface control documents, etc.
• Generate and maintain engineering drawings and configuration‑management policies for FPGA project hierarchy.
• Develop project test plans and procedures, provide test‑planning support, and assist in the execution of both lab testing and field testing.
• Provide occasional technical support and/or field support planning, and other field support as needed.
• Conduct experimental tests on latest FPGA and SoC evaluation boards, evaluate results, and develop specifications for selecting next‑generation components for deliverable systems.
• Work on problems of diverse scope, determine methods and procedures for new assignments, and provide feedback and recommendations to other technical personnel.
• Interact with outside customers, suppliers, and functional peer groups.
• Some travel and work at remote sites for limited time periods may be occasionally required.
• Provide status reports to project managers and/or division production managers as required.

• Ability to be granted a security clearance.
• Experience with at least one FPGA Integrated Design Environment tool set such as Xilinx Vivado and Mentor Graphics Model Sim.
• Experience in signal processing theory and communications systems and the ability to apply theoretical knowledge to resolve real‑world problems.
• Experience with MATLAB signal processing environment.
• BS in Electrical Engineering, Computer Engineering, or a related degree.
• Minimum of 12 years of relevant experience.

• MS in Electrical Engineering, Computer Engineering, or a related field.
• Experience writing test software in C/C++ or assembly language to validate design.
• 5 to 8 years of relevant experience.
• Experience with hardware integration, test, and debug tools (high‑speed logic analyzers, scopes, spectrum analyzers, etc.).
• Familiarity with Electronic Warfare applications.
• Experience with high‑speed (> GHz) design techniques.
• ARM or RISC‑V embedded‑processor‑based SoC design experience.
• Experience with performance characteristics of analog data converters, ADCs/DACs.
• Familiarity with JESD
  204B.
• Existing Secret (or above) clearance.

For this position, the salary range will be $132,000–$237,000 annual equivalent if working full‑time for qualified candidates. This position will be part‑time.

All qualified applicants will receive consideration for employment without regard to sex, race, ethnicity, age, national origin, citizenship, religion, physical or mental disability, medical condition, genetic information, pregnancy, family structure, marital status, ancestry, domestic partner status, sexual orientation, gender identity or expression, veteran or military status, or any other basis prohibited by law. Leidos will also consider qualified applicants with criminal histories consistent with relevant laws.