Principal FPGA Engineer

Principal FPGA Engineer - Onsite position

Curtiss‑Wright is seeking an experienced Principal FPGA Engineer to join our engineering team in Ashburn, VA. In this senior, hands‑on role, you will lead the design and development of FPGA‑based solutions for DoD and other stakeholder secure products. You will mentor junior engineers, provide technical guidance across projects, and collaborate with cross‑functional engineering teams and customers. This role requires strong technical expertise, leadership, and the ability to drive complex projects to completion.

• Work collaboratively with an Integrated Product Team (IPT) to bring products from concept through production release.
• Participate in project planning, scheduling, and resource estimation.
• Lead FPGA design projects, providing architecture, implementation, and validation guidance.
• Develop detailed FPGA architectures and specifications for IP blocks.
• Drive FPGA development from concept through coding, simulation, synthesis, place‑and‑route, and bitstream generation.
• Perform digital logic design and implement HDL using current FPGA technologies.
• Verify and validate HDL designs through simulation and hardware testing.
• Mentor and provide technical guidance to junior FPGA engineers.
• Oversee circuit card development, prototype build, testing, and debugging activities.
• Contribute to new product development through environmental testing and transition into production.

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field (advanced degree is a plus).
• 10+ years of FPGA hardware development experience, including high‑speed, mixed‑signal, or embedded applications at 100/400GZ data rates.
• Strong understanding of FPGA design flow (RTL design, simulation, synthesis, timing closure).
• Proven problem‑solving and debugging skills, with hands‑on experience using lab equipment.
• Experience leading projects or mentoring team members.
• US citizenship is mandatory; active security clearance is preferred.
• Experience/familiarity with simulation test benches (Model Sim, Questa), Xilinx ISE/Vivado, Xilinx 7‑Series, Zynq MPSoC, Versal Adaptive SoC, Ultra Scale+ and embedded processor design.
• Knowledge of Vivado IP Integrator or other IP integration tools, FPGA platforms from AMD (Xilinx), Microchip, or Intel (Altera).
• Board bring‑up, debug (Chip Scope, integrated logic analyzers) and high‑speed digital design concepts.
• High‑speed serial interfaces, related IP, TCL or other automation scripting.
• FPGA resource and power estimation tools, requirements capture, analysis, and tracking.

$ – $ plus bonus (salary range is a general guideline and may vary with qualifications and market).

• Paid Time Off
• 401(k) with Employer Match and Profit Sharing
• Health and Wellness Benefits
• Learning and Development Opportunities
• Referral Program
• Competitive Pay
• Recognition
• Employee Stock Purchase Plan
• Inclusive & Supportive Culture

Curtiss‑Wright is an equal‑opportunity employer. All qualified applicants will receive consideration for employment without regard to race, ethnicity, color, sexual orientation, gender identity, physical or mental disability, age, ancestry, legally protected medical condition, family care status, marital status, religion, veteran status, national origin, or any other legally protected status. For US applicants: EEO is The Law – see more information. If you require accommodation during the recruitment process, please contact Talent Acquisition.