Senior Validation Engineering Manager

Overview

Director of Analog Engineering — leading the Analog Design team within the Memory Interface Chips team. This hands-on leadership role combines technical analog/mixed-signal circuit design with management of a growing engineering team developing next-generation DDR5/DDR6 memory interface buffer chips. Requires deep expertise in high-speed analog/mixed-signal design and proven leadership in guiding teams through specification, architecture, and productization. Based in the greater Atlanta area.

Company is a silicon IP provider for the semiconductor manufacturing industry.

Base pay range
: $/yr - $/yr

Additional compensation types
:
Annual Bonus and RSUs

Job title
: Director of Analog Engineering

• Lead and manage a team of 10+ engineers and designers.
• Drive project planning, scheduling, execution, and risk management.
• Provide technical direction, mentorship, and performance reviews to foster innovation and team development.
• Take a lead role in architectural definition and design implementation of high-speed, low-power analog/mixed-signal DDR PHYs.
• Oversee and review design, layout, documentation, and post-silicon validation activities.
• Collaborate cross-functionally with global teams across geographies and time zones.
• Guide integration of chip components (receivers, transmitters, DLL, regulators, CMOS interfaces, analog-to-digital timing closure).
• Contribute about 25% hands-on design work and about 75% leadership and management (guiding engineers, reviewing work, leading meetings).
• Support customer interactions and provide technical input during design/productization.

• MSEE or Ph.D. with 10+ years of analog/mixed-signal circuit design experience.
• Recent hands-on analog design experience required (not purely managerial).
• Proven leadership in managing and mentoring design/layout teams.
• Strong background in high-speed analog/mixed-signal development (PMIC-focused leaders are not a fit).
• Direct experience in DDR chip design is highly preferred.
• Familiarity with receivers, transmitters, DLLs, regulators, CMOS signal interfaces, and analog-to-digital timing closure.
• Experience with AMS/Co-simulation tools (Cosym, etc.) and mixed-signal modeling preferred.
• Verilog coding and static timing analysis experience is a strong plus.
• Matlab/Simulink modeling experience is a plus.
• Excellent communication, teamwork, organizational skills, detail-oriented, and self-motivated.

• Salary Range: $/yr - $/yr
• Weekly
  
  Schedule:
  
  Hybrid schedule (3 days onsite and 2 days remote), based in Johns Creek, GA

• Director

• Full-time

• Engineering, Management, and Manufacturing
• Industries:
  Semiconductor Manufacturing, Appliances, Electrical and Electronics Manufacturing, and Computers and Electronics Manufacturing