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Sr Design Verification Engineer

Job in Austin, Travis County, Texas, 78716, USA
Listing for: Ventana Micro Systems Inc.
Full Time position
Listed on 2026-02-16
Job specializations:
  • Engineering
    Systems Engineer, Software Engineer
Salary/Wage Range or Industry Benchmark: 100000 - 125000 USD Yearly USD 100000.00 125000.00 YEAR
Job Description & How to Apply Below

Ventana is building the highest-performance RISC-V CPUs on the planet—designed for data center, AI, and edge workloads, with real silicon, not slideware.

Our second-generation Veyron core (V2) is on track to ship early next year, featuring an aggressive wide-issue pipeline and built in 4nm. Development on Veyron V3 is ramping now, with even greater performance and deep AI platform integration. This is your opportunity to work alongside engineers who built iconic processors like the AMD K6 and the first 64-bit ARM server processor (X-Gene at Applied Micro)—bringing decades of CPU innovation to a clean-slate, open-standards future.

We are looking to fill multiple Design Verification openings to continue the development of its innovative RISC‑V processors and subsystems.

Role
  • Develop and execute verification plans for units and features.
  • Construct test benches, scoreboards, and stimulus generators.
  • Implement functional coverage models.
  • Debug designs in simulation, prototyping platforms, and silicon.
Qualifications Required
  • Roles requiring both 4+ and 8+ years industry experience
  • Bachelor’s or Master’s degree in related engineering field
  • Ability to work independently and across geographies
  • Strong domain knowledge of computer architecture
Skills and Qualifications Desired
  • System Verilog verification development experience
  • Testbench construction using UVM or analogous methodologies
  • Scoreboards and stimulus generators for complex units
  • Industry experience with CPU microarchitecture (e.g. x86, ARM, SPARC, MIPS, RISC‑V, POWER) and/or coherent caching systems
  • Software development experience in compiled (C/C++) and interpreted (Python) languages
  • Unit or feature ownership throughout the project lifecycle
  • Post‑silicon validation
EEOE

Ventana is an Equal Employment Opportunity Employer. We value diversity and uphold an inclusive environment where all people feel that they are equally respected and valued. Qualified applicants will receive consideration without regard to race, color, creed, religion, sex, sexual orientation, national origin or nationality, ancestry, age, disability, gender identity or expression, marital status, veteran status, or any other category protected by law.

COVID‑19

Ventana encourages all employees to be fully vaccinated (and boosted, if eligible) against COVID‑19. We do require Proof of vaccination (or proof of a negative PCR test) to work in the office or meet with customers/ business partners.

Notice:
External Recruiters/ Staffing Agencies

Ventana Micro instructs agencies not to engage with its employees to present candidates. Employees are not authorized to enter into any agreement regarding the placement of candidates. All unsolicited resumes received as gratuitous submissions. We reserve the right to directly contact any candidate speculatively submitted by a third party. Such contact will not constitute acceptance of any contractual arrangement between Ventana and the agency, and Ventana will not be liable for any fees should it choose to engage the candidate’s services.

All external recruiters and staffing agencies are required to have a valid contract executed by Ventana’s CFO.

Please Note

Fraudulent job postings/job scams are increasingly common. Our open positions can be found through the careers page on our website.

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