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Senior RTL Verification Architect — PCIe/CXL IP
Job in
Austin, Travis County, Texas, 78716, USA
Listed on 2026-02-16
Listing for:
Siemens EDA (Siemens Digital Industries Software)
Full Time
position Listed on 2026-02-16
Job specializations:
-
Engineering
Systems Engineer
Job Description & How to Apply Below
3.2. The ideal candidate will have at least 15 years of experience in RTL design and verification, with a strong understanding of System Verilog and UVM.
This role offers the opportunity to work within a collaborative team and directly impact customer operations. The company provides a competitive salary and benefits package.
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Position Requirements
10+ Years
work experience
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