Systems Engineer

Job Title

Staff Systems Engineer

2/26/26

Austin

If you are looking for a challenging and exciting career in the world of technology, then look no further. Skyworks is an innovator of high-performance analog semiconductors whose solutions are powering the wireless networking revolution. Through our broad technology expertise and one of the most extensive product portfolios in the industry, we are Connecting Everyone and Everything, All the Time.

At Skyworks, you will find a fast-paced environment with a strong focus on global collaboration, minimal layers of management, and the freedom to make meaningful contributions in a setting that encourages creative thinking. We are excited about the opportunity to work with you and glad you want to be part of a team of talented individuals who together are changing the way the world communicates.

Requisition

The Skyworks RMI-Timing Systems Engineering Team is an elite group of system design engineers focused on developing products and solutions for attractive market opportunities in the form of reference designs, derivative ICs with embedded firmware, and packages. The systems engineering team provides system and application-level expertise to the IC design, software, firmware, validation and application engineering teams. System design engineers have a deep understanding of all aspects of timing system development including product definition, platform design, and validation planning.

Skyworks has a broad portfolio of Timing products encompassing clock generators, network synchronize rs, jitter attenuators, oscillators and buffers. We are the dominant Timing supplier in a high-performance communications timing market thanks to our leading technologies. Our products heavily leverage digital technology and are very flexible and versatile in nature. The combination of high performance and high programmability has led to many product opportunities with minimal cost for new silicon development.

This position is to take these opportunities and turn them into profitable products and customer designs. This position will have the opportunity to interact with our tier one customers, to work with our world-class solution engineering teams and to directly influence and expand our successful timing product roadmap.

• System and platform design leveraging Skyworks Timing portfolio.
• Lead definition, verification, and validation of timing products.
• Develop FPGA IP for emulation, in-house testing, and reference designs.
• Work with cross-functional teams to take the design into production.
• Collaborate with the silicon design team to develop verification/validation tests for silicon under development.
• Collaborate with marketing and application teams to define next generation of products.
• Collaborate with our Software teams to develop innovative FPGA IPs in our PTP reference designs
• Collaborate with cross-functional teams to take a product from definition to production and eventually to end-of-life.

• MSEE in EE with 8+ years of experience or BSEE with 12+ years of experience with systems design preferably in communications or high performance mixed-signal products.
• Experience with system-level simulation tools such as MATLAB.
• Experience with System Verilog, UVM and RNM.
• Experience with FPGA or an ASIC digital design flow.
• Experience with lab equipment such as spectrum analyzers, phase noise analyzers etc.
• Good understanding of phase locked loops, control theory and EM theory; knowledge in communication theory, RF design and signal processing.
• Results oriented and practical minded.

• Familiarity with IEEE-1588 compliant networks is a plus.
• Prior experience with PLL design, validation is a plus.
• Prior experience with timing product development is a plus.

The typical base pay range for this role across the U.S. is currently USD $114,400 - $220,200 per year. Starting base pay will depend on relevant experience and skills, training and education, business needs, market demands, the ultimate job duties and requirements, and work location. Skyworks has…