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ASIC Design Verification Engineer – SystemVerilog​/UVM Expert

Job in Austin, Travis County, Texas, 78716, USA
Listing for: Qualcomm
Full Time position
Listed on 2026-05-18
Job specializations:
  • Engineering
    Systems Engineer, Test Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 126700 - 190100 USD Yearly USD 126700.00 190100.00 YEAR
Job Description & How to Apply Below
Qualcomm is seeking an ASIC Design Verification Engineer in Austin, TX. This role involves managing the entire verification lifecycle, from test planning to post-silicon support. Candidates should have a minimum of 3 years of DV experience using UVM and experience in verifying SOCs. A competitive salary range of $126,700 to $190,100 is offered, alongside a comprehensive benefits package including bonuses and stock options.
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