Package Design Engineer

Renesas is a global leader in microcontrollers, analog, power, and SoC products, delivering semiconductor solutions that power billions of connected, intelligent devices. As the industry shifts toward heterogeneous integration, we are leading the charge in advanced packaging and are seeking a talented Staff Package Design Engineer to join our Advanced Silicon Packaging team to design and deliver the next‑generation, high‑performance packaging solutions that power our world‑class product portfolio.

In this role, you will be at the intersection of silicon design and system implementation. You will play a critical part in designing and delivering next‑generation, high‑performance packaging solutions—including 2.5D/3D, chiplet‑based, FCBGA, SiP, WLCSP, wire bond, and QFP/QFN packages that power our industry‑leading automotive SoCs, industrial IoT microcontrollers, and AI‑forward computing platforms. This role demands strong technical depth in package layout execution, a deep understanding of manufacturability, and a collaborative mindset for cross‑domain co‑design with our global silicon, SI/PI, thermal, and reliability teams.

• Execute package layout design and development for advanced packages, including 2.5D/3D IC, FCBGA, SiP, WLCSP, and multi‑chip modules.
• Develop and maintain package CAD databases, ensuring strict accuracy and adherence to design guidelines, DFM (Design for Manufacturing), and DFA (Design for Assembly) to guarantee high manufacturability and high‑yield reliability.
• Manage the complete design cycle: from schematic creation, netlist import, and footprint assignment to generating manufacturing outputs (Gerbers, drill data, and fabrication/assembly drawings).
• Create and modify substrate/RDL layouts, bump maps, escape routing, and power/ground structures.
• Collaborate closely with SI/PI, thermal, reliability, and DFT teams to support co‑optimization and participate in critical design reviews.
• Ensure all designs strictly comply with foundry, OSAT, and manufacturing design rules (DRC, LVS).
• Support Engineering Change Orders (ECO) cycles, design updates, and version control throughout the project lifecycle.

• 4+ years of hands‑on experience in Package CAD layout and development.
• Strong background in 2.5D / 3D IC packaging, FCBGA, advanced substrate‑based packages, and multi‑die/chiplet‑based designs.
• High proficiency in industry‑standard tools such as Cadence Allegro Package Designer (APD / SiP), Siemens Xpedition / Substrate Integrator, or equivalent.
• Proven experience working with advanced manufacturing design rules and interfacing directly with Tier‑1 OSATs and foundries.
• Solid basic understanding of Signal Integrity (SI) and Power Integrity (PI) fundamentals, high‑speed routing, impedance control, and crosstalk mitigation.
• Strong communication, presentation, and documentation skills with a proven track record of working effectively in global, cross‑functional team environments.

• Bachelor’s or Master’s degree in Electrical Engineering, Microelectronics, Materials Science, or a related technical discipline.

Renesas Electronics is an equal opportunity and affirmative action employer, committed to celebrating diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by federal, state or local law. For more information, please read our Diversity & Inclusion Statement.

Renesas Electronics deals with dual‑use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.