CPU Verification Engineer

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** Welcome!**## .CPU Verification Engineer page is loaded## CPU Verification Engineer locations:
US, Texas, Austin time type:
Full time posted on:
Posted Todayjob requisition :
JR0281846#
** Job Details:**##

Job Description:

Join Intel's Silicon Engineering Group as a CPU Design Verification Engineer, where you will play a pivotal role in ensuring the functional accuracy and performance of next-generation processor  this role, you will collaborate with architects, RTL developers, and physical design teams to verify and validate cutting-edge CPU architectures that power millions of devices globally. This position offers the opportunity to contribute to the development of innovative solutions, refine industry-leading methodologies, and shape the future of computing.

Key Responsibilities:

* Develop and execute comprehensive verification plans to validate CPU logic against architectural specifications
* Build scalable UVM-based test benches and define robust functional coverage models
* Run system-level simulations to uncover design bugs and ensure functional integrity
* Debug and root-cause issues in the pre-silicon environment; implement corrective measures to resolve test failures
* Collaborate closely with CPU architects and RTL designers to verify complex architectural and microarchitectural features
* Maintain and improve existing verification infrastructure, methodologies, and flow automation
* Document verification strategies and lead technical reviews with design and architecture teams
* Contribute to the definition and refinement of CPU architecture and microarchitecture features to meet functional, performance, and power goals

Take the next step in your career by joining a team where your contributions make a global impact. Apply today and help Intel engineer the future of technology.##
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* Qualifications:

** Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
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* Minimum Qualifications:

*** Bachelor's degree or Master’s degree in Electrical Engineering, Computer Engineering, or a STEM-related field

With at least 2+ years of work experience in:
* Computer architecture, including specific areas of technical ownership/expertise relevant to CPUs
* Hardware modeling languages, such as Verilog, VHDL, or System Verilog and industry standard logic simulation tools
* Validation and debug experience such as test writing/generation, checker development, coverage analysis, failure debug, root cause analysis
* At least one language: C/C++, Perl, Python, etc.
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* Preferred Qualifications:

*** PhD in Electrical Engineering, Computer Engineering, or a STEM-related field
* Strong expertise in System Verilog for developing UVM-based test benches
* Experience with Synopsys simulators (e.g., VCS), debug tools, and version control software such as GIT
* Familiarity with x86 architecture and assembly programming
* Knowledge of agile development methodologies and teamwork in cross-functional environments
* Exceptional analytical and debugging skills, and a creative approach to solving complex challenges

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

For information on Intel’s immigration sponsorship guidelines, please see## Job Type:Experienced Hire##

Shift: Shift 1 (United States of America)## Primary

Location:

US, Texas, Austin## Additional Locations:## Business group:

Silicon and Platform Engineering Group (SPE):
Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.## Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic…