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Senior ASIC RTL Architect - DDR​/PCIe​/UCIe Innovator

Job in Austin, Travis County, Texas, 78716, USA
Listing for: Synopsys, Inc.
Full Time position
Listed on 2026-06-19
Job specializations:
  • Engineering
    Hardware Engineer, Systems Engineer, Electronics Engineer, Engineering Design & Technologists
Salary/Wage Range or Industry Benchmark: 130000 - 160000 USD Yearly USD 130000.00 160000.00 YEAR
Job Description & How to Apply Below

Synopsys, Inc. is looking for an experienced ASIC Digital Architect to lead the future of semiconductor technology. The role involves defining and developing ASIC RTL design and verification for advanced digital designs including protocols such as DDR, PCIe, UAL, and UCIe.

The ideal candidate will mentor junior engineers and collaborate across teams to enhance design processes and drive innovations. In return, you can expect a dynamic work environment and a comprehensive range of health and wellness benefits.

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Position Requirements
10+ Years work experience
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