Principal AI Compiler Engineer Austin,Texas, Product Development Posted ago

Position: Principal AI Compiler Engineer Austin,Texas,United States Product Development Posted 3 hours ago
## Principal AI Hardware Architect Austin,Texas,United States Find out how well you match with this jobJob ID783755## Grow with us
** Principal AI Hardware Architect — Hardware/Software Co-Design
** The Architect Who Closes the Gap. The Engineer Who Makes Silicon Inevitable.
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* Location:

Austin, TX Team:
Cross-functional leadership across Model Engineering, AI Infrastructure, and Silicon Architecture
**** The Problem Nobody Else Is Solving
** Most chip programs are full of brilliant people who never quite speak the same language.

Researchers build ambitious AI models. Silicon teams build powerful hardware. Infrastructure teams wire it all together. And somewhere in the space between those three worlds — in the handoffs, the assumption gaps, the untranslated requirements — massive performance dies quietly on the floor.

We're not hiring someone to manage that problem. We're hiring the person who architects it out of existence.
** The Role
** As Principal AI Hardware Architect, you will own the most consequential technical contract in the company: the binding agreement between what AI workloads demand, what software systems can express, and what custom silicon can physically deliver.

This is not a support role. This is not a liaison role. This is the highest-leverage engineering seat in the building — the person who looks at a next-generation LLM, a multimodal inference pipeline, or a signal processing workload and answers the question that determines whether a chip program succeeds or settles:"Here's exactly what this workload needs from silicon — and here's the proof it will work before we ever tape out."Your

decisions won't live in documents. They'll be etched into hardware. Your performance models will guide compute investments. Your architectural direction will shape memory hierarchies. Your cross-team alignment will determine whether the company builds capable hardware — or hardware nobody else can touch.
** What You'll Own
** Workload-to-Architecture Translation  You take real, modern AI workloads — LLMs, multimodal systems, signal processing pipelines, inference engines — and translate them into the concrete hardware requirements that actually matter: compute paths, memory movement, bandwidth ceilings, interconnect priorities, and the specialized acceleration capabilities that turn a good chip into the right chip.

Hardware/Software Co-Design Leadership  You are the bridge that doesn't bend. You connect model engineering, AI infrastructure, and silicon architecture teams so that every major hardware investment is both architecturally sound and software-accessible. When workload ambition outpaces hardware capability, you find the path forward. When silicon innovation creates a performance unlock, you make sure the software stack can actually reach it.

Performance Model Ownership  Before a single gate is placed, your analytical, simulation, and cycle-approximate performance models are already shaping the architecture. You build and own the projection systems that guide compute investments, memory hierarchy decisions, and feature prioritization — turning uncertainty into defensible, data-driven direction.

Real Workload Validation  You profile real workloads on real and future platforms. You find the bottlenecks — in memory, compute, scheduling, and architecture — and you feed those findings directly into the next hardware and software cycle. No guesswork. No assumptions. Just ground truth.

Strategic Technical Translation  You align people who think in different languages. Hardware architects, AI researchers, and infrastructure teams all operate with different mental models and different vocabularies. You translate across all of them — grounding every product decision in real workloads, measurable constraints, and practical execution paths.## Join our Team
** What You Bring
** AI/ML Systems Depth You understand modern AI architectures from the inside — inference systems, quantization strategies, deployment constraints, and how workload behavior actually manifests in silicon utilization. You don't just know what a Transformer does. You know what it costs.

Silicon Architecture Fluency You've worked with…