Coherent Fabric Design
Listed on 2026-07-20
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Engineering
Hardware Engineer, Systems Engineer
Job Overview
Are you ready for a new and exciting challenge? If you are a self‑motivated and efficient RTL logic design engineer looking to make a difference in an innovative and inclusive team, you’ve come to the right place! The candidate will join the System IP Coherent Interconnect design team responsible for the development of highly scalable, configurable, flexible, high performance, and powerful mesh to deliver the incredible amount of bandwidth for hyperscale, AI Infrastructure, yet power efficient for IoT, and Automotive line of business.
The candidate should have a detailed understanding across all design aspects to deliver successful IP with optimal PPA. This includes low‑power design techniques and awareness of the impact of design decisions on system performance. In addition, the candidate would fully apply engineering resourcefulness and soft skills to produce designs that are delivered on‑time and with highest quality. The candidate will collaborate regularly with peer teams like verification, implementation, performance, and project management.
Responsibilities- Logic design using System Verilog RTL coding
- The planning, tracking, and coordinating of individual tasks to meet high quality goals at the planned milestone
- Working closely with design, tool, verification, and power teams to share the responsibility of delivering high quality hardware designs, including debugging functional or performance issues using simulation and debug tools
- Improving design methodology across the System IP group and wider Arm design community
- Some level of experience in fabric and interconnect design
- Knowledge of high‑speed interfaces such as AMBA CHI and/or AXI
- Familiarity with PCI Express (PCIe), Ethernet, DDR is a plus
- Minimum Bachelors or Masters degree in Computer Engineering/Electrical Engineering
- Knowledge of topics including transaction ordering, virtualization, MMUs, cache coherence, and host bridge functions
- History of high quality, low power, high performance RTL logic design in reasonable timescales
- Experience with Lint, synthesis, static timing, and DFT
- Understand of physical design and verification methods
- Experience with scripting languages like Perl, Ruby, etc., and competence with Unix/Linux, shells, and Makefiles
We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment.
Eligibilityfor Sponsorship
Note this role does not meet the eligibility requirements for sponsorship, and therefore the successful candidate must have the right to work in the US without relying on sponsorship by Arm.
Salary Range$161,500 - $218,500 per year
Hybrid WorkingArm’s hybrid approach to working is centred around flexibility, where we split our time between the office and other locations to get our work done. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations; where this is the case, we will collaborate with you to find the best solution.
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