ASIC Implementation Engineer - Static Verification
Job in
Austin, Travis County, Texas, 78716, USA
Listing for:
Meta
Full Time
position
Listed on 2026-08-17
Job specializations:
-
Engineering
Hardware Engineer, Systems Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 114000 - 172000 USD Yearly
USD
114000.00
172000.00
YEAR
Job Description & How to Apply Below
Summary:
Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, synthesis to build efficient System on Chip (SoC) and IP for data centre applications.
Required Skills:ASIC Implementation Engineer - Static Verification Responsibilities:
Perform Flat and Hierarchical Clock Domain Crossing and work with the designers to analyze the complex clock domain crossings and sign off the CDCPerform Flat and Hierarchical Reset Domain crossing Checks. Understand the Reset-Architecture by working with Design and FW teams and develop reset groups and the corresponding reset sequence for RDCPerform RTL Lint and work with the Designers to create waiversPerform RTL DFT Analysis and improve the DFT coverage for Stuck-at faultsRun Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for Timing, Area, PowerDeveloping Automation scripts and Methodology for all FE-tools including (Lint, CDC, RDC,)Work closely with the Design Engineers, DV Engineers, Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedbackMinimum Qualifications:Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta2+ years of experience in static verification toolsExperience with Lint, Clock Domain & Reset Domain crossingExperience with SOC CDC signoffKnowledge of SOC Integration (Clocking, Reset, PLL, etc)Knowledge of front-end ASIC flowsExperience with RTL design using System Verilog or other HDLExperience with communicating across functional internal teams and vendorsPreferred Qualifications:Experience with SOC Design Integration and Front-End ImplementationExperience with Netlist-CDC Analysis and improving MTBFKnowledge of Timing/physical libraries, SRAM MemoriesScripting and programming experience using Perl/Python, TCL, and MakeExperience with developing structural rule based checks for RTL & NetlistExperience with Design Compiler, Spyglass, Prime Time, Formality or equivalent toolsPublic Compensation:
$114,000/year to $172,000/year + bonus + equity + benefits
Industry:
Internet
Equal Opportunity:
Meta is proud to be an Equal Employment Opportunity and Aff… Meta participates in the E‑Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at
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