AI​/ML Logic Design Engineer-Senior

Qualcomm seeks a Senior AI/ML Logic Design Engineer to architect and implement advanced digital logic blocks for wireless and multimedia SoCs. You will design, verify, and optimize ML accelerators and DSP-centric hardware in cutting edge process nodes, focusing on low power, high performance, and area efficiency. Responsibilities include RTL design, micro architecture, synthesis, timing closure, and collaboration with verification and physical design teams.

You will guide junior engineers, influence chip architecture, and help bring next generation 5G, AI, and edge computing products to market in a fast paced, innovation driven environment.

Responsibilities

• Architect and implement digital logic and micro architectures for AI/ML accelerators and wireless So
• Cs
• Develop synthesizable RTL (e.g., Verilog/System
• Verilog) and ensure quality, scalability, and reusability
• Collaborate with architecture, verification, and physical design teams to close timing, power, and area
• Perform synthesis, static timing analysis, and logic optimization in advanced technology nodes
• Drive design reviews, documentation, and sign off for logic blocks and subsystems
• Support verification teams with test plans, coverage goals, and debug of logic issues
• Profile and optimize hardware for performance, power efficiency, and memory bandwidth
• Contribute to IP integration, chip level bring up, and silicon validation activities
• Mentor junior engineers and share best practices in RTL design and verification
• Stay current on AI/ML hardware trends and propose enhancements to future Qualcomm platforms

Required Skills

• Digital logic design
• RTL design (Verilog/System
• Verilog)
• Micro architecture specification
• Synthesis
• Static timing analysis (STA)
• AI/ML accelerator hardware
• DSP and signal processing concepts
• Low power design techniques
• ASIC/So
• C design flows
• Scripting (Python/Perl/TCL)