Level Static Timing Analysis And Timing Closure Engineer
Job in
Austin, Travis County, Texas, 78716, USA
Listed on 2026-09-09
Listing for:
Sivaltech
Full Time
position Listed on 2026-09-09
Job specializations:
-
Engineering
Electronics Engineer, Hardware Engineer, Systems Engineer
Job Description & How to Apply Below
Key
Skills:
- Full-chip / Top-level STA and Timing Closure
- Post-layout timing signoff
- Prime Time and/or Tempus
- MMMC, SDC, Setup & Hold closure
- SI/Crosstalk, OCV, AOCV/POCV
- ECO implementation
- Tcl and Python scripting
If you have strong experience in ASIC/SoC top-level timing closure and signoff
, we would like to hear from you!
Interested candidates, please share your updated resume.
- #Hiring #Sivaltech #STA #Timing Closure #ASIC #SoC #Prime Time #Tempus #Semiconductor Jobs
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
Search for further Jobs Here:
×