Test Engineer; Infrastructure​/Speed I​/O Specialty

ADVANCE YOUR CAREER. ADVANCE THE WORLD.
At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

ADVANCE YOUR CAREER. ADVANCE THE WORLD.
At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.
Whatever you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.

AMD is seeking an experienced Test Engineer to develop and advance wafer-sort test infrastructure on Advantest V93000 platforms using Smar Test 8. In this highly visible role, you will contribute to AMD’s common Base Test Program and Test Shell while leading test enablement for high-speed I/O and die-to-die interfaces.

You will have the opportunity to influence test strategy across the full product lifecycle—from first-silicon bring-up and characterization through production release and high-volume manufacturing. Your work will directly improve test quality, yield, test time, scalability, and release readiness for next-generation microprocessor and chiplet products.

You are a hands-on ATE Test Engineer with deep experience developing and debugging test programs on Advantest V93000 platforms. You understand how silicon, test software, tester and probe hardware, patterns, timing, and manufacturing processes interact.

You bring strong technical judgment, disciplined software-development practices, and the ability to lead complex debug efforts across global teams. You are an effective communicator and mentor who can influence infrastructure strategy across products and organizations.

• Develop and integrate reusable wafer-sort Base Test Program and common Test Shell infrastructure, including test flows, services, configurations, diagnostics, data collection, and release controls.
• Lead Smar Test 8 and Advantest V93000 test program development, debug, validation, release readiness, and production support.
• Drive wafer-sort strategy, first-silicon bring-up, characterization, margining, screening, diagnostics, and failure isolation for high-speed I/O and die-to-die interfaces.
• Integrate patterns, timing, levels, test methods, device configurations, binning, and debug capabilities into the common test program.
• Troubleshoot complex interactions across silicon, test software, tester and probe hardware, patterns, timing, and manufacturing processes.
• Partner with Design, Design for Test, Product Engineering, Yield Engineering, Test Hardware, and Manufacturing teams to improve coverage, testability, yield, test time, and product quality.
• Define scalable architecture and coding practices that enable reuse across products, silicon revisions, test insertions, and manufacturing sites.
• Lead technical reviews, document architectural decisions, mentor engineers, and support global engineering teams, manufacturing partners, and equipment vendors.

• Extensive Advantest V93000 test program development and debug experience, including Smar Test 8.
• Proficiency in Java and at least one additional language, such as C++, Python, Perl, or shell scripting.
• Experience developing test flows, methods, patterns, timing, levels, diagnostics, characterization plans, and manufacturing screens.
• Experience leading or making significant architectural contributions to a…