Design Verification Engineer – CPU Core Verification; ALU

Position: Staff Design Verification Engineer – CPU Core Verification (ALU)
About Si Five As  the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer.

With SiFive, the future of RISC-V has no limits.

At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.

Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions. Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time.

Are you ready?

To learn more about SiFive’s phenomenal success and to see why we have won the GSA’s prestigious Most Respected Private Company Award (for the fourth time!), check out our website and Glassdoor pages.

Job Description:

About the Role Si Five  is looking for a Staff Design Verification Engineer to drive verification of high-performance CPU core functionality, with primary focus on ALU and integer-execution microarchitecture.

This is a Staff individual-contributor role within the CPU Design Verification organization, focused on high-performance out-of-order CPU core development.

The role spans core execution areas such as ALU pipelines, issue/dispatch interactions, dependency and forwarding behavior, replay and recovery handling, exception behavior, and related midcore control interactions. We are looking for an engineer who can independently own complex verification problems, define verification strategy early, identify microarchitectural risk, and raise verification quality across the broader CPU DV effort.

You will work closely with architecture, RTL, performance, and verification teams to ensure design intent is captured correctly, difficult corner cases are verified thoroughly, and signoff quality is achieved with strong technical judgment and scalable methodology.

Responsibilities Own verification planning and execution for ALU- and execution-focused CPU core functionality, from block-level verification through core-level integration and signoff.

Drive verification strategy, test planning, debug, coverage analysis, and closure for complex execution-pipeline behaviors and microarchitectural interactions.

Define effective verification approaches for challenging ALU-related behaviors such as arithmetic and logical execution correctness, compare and branch-condition generation, operand dependency handling, bypass and forwarding behavior, replay scenarios, flush and recovery interactions, exception behavior, and issue/dispatch to execute/commit pipeline interactions.

Verify corner-case interactions between ALU execution and surrounding core logic, including score boarding, operand readiness, structural conflicts, speculative execution effects, and interaction with branch, load/store, and commit behavior.

Develop and maintain robust verification environments, checkers, scoreboards, assertions, stimulus, and coverage models that expose corner cases and improve bug-finding efficiency.

Partner closely with architecture and design teams from early feature-definition stages to review specifications, identify ambiguity, and improve design debugability and verification completeness.

Drive efficient failure analysis and…