Junior FPGA Engineer

Junior FPGA Engineer

K  is seeking a Junior FPGA Engineer to support the development, testing, and verification of FPGA‑based signal processing and communications systems. This role is ideal for early‑career engineers interested in FPGA design, DSP, and embedded systems, and provides hands‑on experience working alongside experienced engineers in a mission‑focused laboratory environment.

• Innovative Projects: K ’s work is at the forefront of engineering, logistics, operations, science, program management, mission IT and cybersecurity solutions.
• Collaborative Environment:
  Be part of a dynamic team that thrives on collaboration and innovation, fostering a supportive and intellectually stimulating workplace.
• Impactful Work:
  Your contributions will be pivotal in designing and optimizing defense systems that ensure national security and shape the future of space defense.

• Assist in the development, implementation, and testing of FPGA logic for digital signal processing and communications applications.
• Support the implementation of basic DSP functions in FPGA hardware under guidance from senior engineers.
• Assist with FPGA integration, hardware bring‑up, and debugging in laboratory environments.
• Develop and run simulation test benches to verify functional behavior of FPGA designs.
• Support integration of FPGA logic with embedded processors and system interfaces.
• Assist with documentation, version control, and configuration management activities.
• Participate in design reviews, peer reviews, and team technical discussions.
• Learn and apply FPGA development workflows, best practices, and debugging techniques.

• Bachelor’s degree in Electrical or Computer Engineering
• Coursework or internship experience involving FPGA design, digital logic, or signal processing
• Familiarity with VHDL and/or Verilog
• Basic understanding of DSP concepts such as filtering and sampling
• Familiarity with Linux and version control tools such as Git
• Ability to obtain and maintain a U.S. DoD security clearance

• Academic or internship experience with FPGA tools such as Vivado
• Exposure to SDR concepts or communications systems
• Familiarity with MATLAB, Python, or C/C++

Basic Compensation: $90,000 - $110,000 (For Beavercreek, OH Only)

The offered rate will be based on the selected candidate’s knowledge, skills, abilities and/or experience and in consideration of internal parity.

K  is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, disability, sex, sexual orientation, gender identity or expression, age, national origin, veteran status, genetic information, union status and/or beliefs, or any other characteristic protected by federal, state, or local law.

Job : R2122197