Principal Signal Integrity Engineer
Job in
Beaverton, Washington County, Oregon, 97075, USA
Listed on 2026-06-03
Listing for:
FormFactor, Inc.
Full Time
position Listed on 2026-06-03
Job specializations:
-
Engineering
Electrical Engineering, Systems Engineer, Electronics Engineer
Job Description & How to Apply Below
Form Factor, Inc. (NASDAQ: FORM), is a leading provider of essential test and measurement technologies along the full semiconductor product life cycle - from characterization, modeling, reliability, and design de-bug, to qualification and production test. Semiconductor companies rely upon Form Factor's products and services to accelerate profitability by optimizing device performance and advancing yield knowledge. The company serves customers through its network of facilities in Asia, Europe, and North America.
Rooted in our core values - Focus on the Customer, Ownership & Accountability, Respectfully & Effectively Communicate, and Motivate & Develop People - we foster an environment where diverse perspectives are not only welcomed but celebrated. Everyone can make an impact here. Whether it's improving products, supporting customers, or positively influencing peers and the community, the contributions of our people matter.
Shift:
The regular hours for this position are day shift.
Job Description:
In the role of Principal Signal Integrity Engineer, you will be responsible for completing tasks on time and solving short- and long-term problems. You will be part of a technical group, responsible for improving SI/PI performance, completing production design analysis, and measurement and characterizing. This role will be working with customers and engineers across multiple sites, California US, Europe and Asia Regions.
Key Responsibilites:
Design & Analysis
* Perform signal and power integrity analysis for high‑speed interconnects (PCB, package, MLO, probe card).
* Develop and validate electrical models for Transmission lines, vias, connectors, and PDN (Power Distribution Network) structure.
* Define stack‑ups, impedance targets, and routing constraints.
* Evaluate and optimize Reflections, insertion/return loss, and Crosstalk and jitter performance.
Simulation & Modeling
* Use EM and circuit tools (e.g., HFSS, ADS, SIwave, Power
SI) for Frequency‑domain and time‑domain analysis.
* Build system/channel models (e.g., IBIS‑AMI, eye diagrams).
* Run what‑if studies to optimize performance and reduce design risk.
Testing & Validation
* Define and execute SI validation plans using VNA, TDR, TDT and high‑speed measurement setups.
* Define test fixtures and correlation structures.
* Drive simulation-to-measurement correlation and root cause analysis.
* Drive design improvements based on measured data.
Design Support & Collaboration
* Provide design guidelines, constraints, and best practices to layout teams and electrical design engineers.
* Collaborate globally with engineering teams and customers.
* Support new product development programs (e.g., probe cards, load boards).
Continuous Improvement & Innovation
* Improve modeling methodologies and design workflows.
* Reduce simulation cycle time and improve design quality.
* Stay current with High-speed interfaces (PCIe, HBM, Ser Des), and Emerging packaging and interconnect technologies.
* Contribute to next-generation architecture and roadmap development.
Preferred Qualifications:
* BS/MS in Electrical Engineering (or related field).
* 4+ years of relevant experience in SI/PI analysis and design.
* Strong understanding of Transmission line theory, Power integrity principles, and Crosstalk and signal degradation mechanisms
* Experience with tools such as HFSS, ADS, SIwave, Power
SI, Power
DC, SPICE, Allegro, MATLAB.
* Hands-on experience with measurement tools (VNA, TDR/TDT).
* Experience with high-speed interfaces (PAM4, Ser Des, PCIe, HBM).
* Scripting/automation (Python, MATLAB).
* Experience in advanced packaging, probe cards, or fine-pitch interconnects.
Skills:
Allegro PCB Designer, ANSYS HFSS, Cadence Tools, High Speed Interfaces, MATLAB, Power Distribution Design, Power Integrity, PSpice Circuit Simulation, Python (Programming Language), SERDES, Signal Integrity, Signal Integrity Analysis, Transmission Line Design
Education & Experience:
Minimum of 5 years of related experience with a Bachelor's degree; or 3 years and a Master's degree; or a PhD without experience; or equivalent work | Required
Pay Range:
$ - $
Pay Range Explained:
This role in Livermore,…
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