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DDR PHY Design Engineer - RTL, Timing & Silicon
Job in
Beaverton, Washington County, Oregon, 97078, USA
Listed on 2026-07-18
Listing for:
Apple Inc.
Full Time
position Listed on 2026-07-18
Job specializations:
-
Engineering
Test Engineer, Hardware Engineer, Electronics Engineer
Job Description & How to Apply Below
Apple Inc. is seeking a DDR Design Engineer to join the DDR PHY design team in Beaverton, OR. You will contribute to high-performance, low-power digital designs from concept through silicon bring-up, working closely with architecture, verification, and validation engineers.
The role emphasizes RTL in Verilog/System Verilog, formal verification, timing closure, and power characterization, with a strong focus on testability and DFT readiness. Prior DDR PHY experience is a plus.
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