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Senior Digital Layout Engineer ‑Gen ASICs

Job in Beaverton, Washington County, Oregon, 97078, USA
Listing for: Apple Inc.
Full Time position
Listed on 2026-08-31
Job specializations:
  • Engineering
    CAD/ AutoCAD/ Mechanical Design, Engineering Design & Technologists, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 120000 - 180000 USD Yearly USD 120000.00 180000.00 YEAR
Job Description & How to Apply Below
Position: Senior Digital Layout Engineer for Next‑Gen ASICs

Apple Inc. in Beaverton, Oregon, seeks an experienced Digital Layout Designer to craft state-of-the-art ASIC layouts.

You will design complex custom digital macros, review floor plans, and work with the circuit and CAD teams to produce robust physical designs for next-generation chips. Ideal candidates bring a decade of layout experience, strong RC delay and electromigration knowledge, and proficiency with CALIBRE/ Mentor Graphics or Cadence tools.

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Position Requirements
10+ Years work experience
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