×
Register Here to Apply for Jobs or Post Jobs. X

Sr. SDE, MLA hardware​/software co-design, Annapurna Labs Machine Learning Acceleration

Job in Bee Cave, Travis County, Texas, USA
Listing for: Amazon
Full Time position
Listed on 2026-07-02
Job specializations:
  • Engineering
    Systems Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 159200 - 215300 USD Yearly USD 159200.00 215300.00 YEAR
Job Description & How to Apply Below

Sr. SDE, MLA hardware/software co-design, Annapurna Labs Machine Learning Acceleration

AWS Utility Computing (UC) provides product innovations — from foundational services such as Amazon’s Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWS’s services and features apart in the industry. As a member of the UC organization, you’ll support the development and management of Compute, Database, Storage, Internet of Things (IoT), Platform, and Productivity Apps services in AWS, including support for customers who require specialized security solutions for their cloud services.

Custom machine learning chips are at the heart of our Trainium machine learning instances, and we invite you to build them with us!

As a senior SDE in the pre‑silicon team, you will drive pre‑silicon hardware/software co‑development for our machine learning chips. You will collaborate with architecture, design, and emulation teams to build and test next‑generation AI chips. You will write bare‑metal software and ML workloads to verify the end‑to‑end functionality and performance of the SoC. If you have a solid background in embedded software, system development or chip design, we welcome you to join us.

Basic

Qualifications
  • 7+ years of ASIC implementation, synthesis, STA and physical design in deep sub‑micron nodes (16nm or smaller)
  • 7+ years of digital design in communication systems
  • 7+ years of full‑custom analog or RF layout
  • 7+ years of wireless communications systems and implementation
  • 8+ years of creating and maintaining automation frameworks for post‑silicon flow
  • 7+ years of verification in communication systems
  • 5+ years of UVM, C, SystemC, and scripting
  • 3+ years of emulation
  • Bachelor's degree in Electrical Engineering or related field
  • Knowledge of UVM and MATLAB
  • Knowledge of implementing chips with multiple power islands and power gating
  • Knowledge of multiple access systems including OFDMA, TDMA, and CDMA
  • Knowledge of end‑to‑end network system architecture from wireless physical layer to application endpoints
  • Knowledge of serial protocols including SPI, I2C, I3C, and UART
  • Knowledge of Python and Embedded C programming
  • Experience in communication theory, OFDM, MIMO, Digital/Wireless Communication Systems or RF engineering
  • Experience with current and upcoming RF standards in cellular (4G/5G), WiMAX, 802.11ad, microwave backhaul, DVB‑S2 / DVB‑C, or related broadband wireless standards
  • Experience leading or solely developing methodology and scripts for physical synthesis
  • Experience taping out chips that have gone into high volume production
  • Experience developing products for volume production
  • Experience low power design techniques
  • Experience delivering products to volume production
  • Experience in modem L1/L2 algorithm development and architectures
  • Experience in developing link and system level simulators using MATLAB, Python, or C++
  • Experience in test setup automation using MATLAB, Python, or Pearl
  • Experience with Agile, TDD, BDD, CI, and Git
  • Experience developing PHY/MAC layer HW/SW targeting SoCs, FPGAs, and general‑purpose processors
  • Experience leading technical initiatives and key deliverables
  • Experience with version control systems and CI/CD pipeline implementation
  • Experience in Bare Metal Environment development, including linker scripts, page tables and NVIC
Preferred Qualifications
  • Master's degree or Ph.D. in Electrical Engineering or related field
  • Experience in RTL coding and debugging, as well as performance, power, area analysis and trade‑offs
  • Experience with modern ASIC/FPGA design and verification tools
  • Experience with SoC bring‑up and post‑silicon validation

Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.

Location and Compensation:

  • USA, CA, Cupertino –  –  USD annually
  • USA, TX, AUSTIN –  –  USD annually
  • USA, TX, Austin –  –  USD annually
  • USA, TX, Bee Cave –  –  USD annually

Posted: June 26, 2026 (Updated about 3 hours ago)

#J-18808-Ljbffr
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
 
 
 
Search for further Jobs Here:
(Try combinations for better Results! Or enter less keywords for broader Results)
Location
Increase/decrease your Search Radius (miles)
0
200
Filters
Education Level
Experience Level (years)
Posted in last:
Salary