Sr. SDE, MLA hardware​/software co-design, Annapurna Labs Machine Learning Acceleration

Overview

AWS Utility Computing (UC) provides product innovations — from foundational services such as Amazon’s Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWS’s services and features apart in the industry. As a member of the UC organization, you’ll support the development and management of Compute, Database, Storage, Internet of Things (IoT), Platform, and Productivity Apps services in AWS, including support for customers who require specialized security solutions for their cloud services.

Custom machine learning chips are at the heart of our Trainium machine learning instances, and we invite you to build them with us! As a senior SDE in the pre-silicon team, you will be responsible for driving the pre-silicon hardware/software co-development for our machine learning chips. You will work with architecture, design and emulation teams to build and test our next generation AI chips.

You will write bare-metal software and ML workloads to verify the end-to-end functionality and performance of the SoC. If you have a solid background in embedded software, system development or chip design, come join us!

Why AWS. Amazon Web Services (AWS) is the world’s most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating — that’s why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses.

Utility Computing (UC) provides product innovations — from foundational services to ongoing product updates that extend AWS services and features. As a member of the UC organization, you’ll support the development and management of Compute, Database, Storage, Internet of Things (IoT), Platform, and Productivity Apps services in AWS, including support for customers who require specialized security solutions for their cloud services.

You will write bare-metal software and ML workloads to verify end-to-end functionality and performance of the SoC, and collaborate with architecture, design and emulation teams on next-generation AI chips.

• 7+ years of ASIC implementation, synthesis, STA and physical design in deep sub-micron nodes (16nm or smaller) experience
• 7+ years of digital design in communication systems experience
• 7+ years of full-custom analog or RF layout experience
• 7+ years of wireless communications systems and implementation experience
• 8+ years of creating and maintaining automation frameworks for Post-Silicon Flow experience
• 7+ years of verification in communication systems experience
• 5+ years of UVM, C, System C, and scripting experience
• 3+ years of emulation experience
• Bachelor's degree in Electrical Engineering or a related field
• Knowledge of UVM and Matlab
• Knowledge of implementing chips with multiple power islands and power gating
• Knowledge of multiple access systems including OFDMA, TDMA, and CDMA
• Knowledge of end-to-end network system architecture from wireless physical layer to application endpoints
• Knowledge of serial protocols including SPI, I2C, I3C, and UART
• Knowledge of Python and Embedded C programming
• Experience in communication theory, OFDM, MIMO, Digital/Wireless Communication Systems or RF engineering
• Experience with current and upcoming RF standards in cellular (4G/5G), WiMAX, 802.11ad, microwave backhaul, DVB-S2 / DVB-C, or related broadband wireless standards
• Experience leading or solely developing methodology and scripts for physical synthesis
• Experience taping out chips that have gone into high volume production
• Experience developing products for volume production
• Experience low power design techniques
• Experience delivering products to volume production
• Experience in modem L1/L2 algorithms development and architectures
• Experience in developing link and system level simulators using MATLAB, Python, or C++
• Experience in test setup automation using MATLAB, Python, or Pearl
• Experience with Agile, TDD, BDD, CI, and Git
• Experience developing PHY/MAC layer HW/SW targeting SoCs, FPGAs, and general-purpose processors
• Experience leading…