Algorithm Engineer

At Swave, we are disrupting the display market with our revolutionary Holographic eXtended Reality (HXR) technology— the Holy Grail of AR display tech. To visualize these holograms instantly, a Holographic Processing Unit (HPU), running advanced Computer‑Generated Holography (CGH) methods, drives the display. But a brilliant algorithm is only as good as the silicon it runs on.

As our Fixed‑Point Algorithm Engineer, you are the vital architect bridging the gap between high‑level prototyping and verified hardware. You sit at the high‑stakes intersection of theoretical mathematics and physical implementation. You are the person who looks at a complex, floating‑point MATLAB prototype and sees the path to a lean, bit‑true model in C or MATLAB that drives our hardware solution toward FPGA verification in a structured and streamlined manner.

You don’t just "forward‑translate" code; you "travel backwards", too. Armed with a deep understanding of hardware constraints, you leverage your algorithmic insights to challenge and refine the designs themselves. Your goal is to deliver breathtaking holographic quality while optimizing for every square millimeter and milliwatt, ensuring we meet challenging latency specs without blowing the area or power budget.

You will join our HPU & Software team, acting as the technical glue between our Algorithm researchers and our Silicon designers. Your goal is to take ownership of the model that dictates how our holograms come to life.

• You will own the transition from floating‑point MATLAB prototypes to rigorous fixed‑point C/ MATLAB models, ensuring that what works in theory works perfectly in RTL and on FPGA.

• You will navigate the "Good, Fast, Cheap" triangle, proactively modifying algorithms to fit strict hardware constraints, achieving higher throughput and lower memory usage without sacrificing image quality.

• You will drive the verification strategy, debug and validate your models against hardware to ensure absolute precision, and automate the flow between algorithm updates and hardware testing.

• Over the next two years, you will evolve from a model expert into a strategic advisor, using your deep knowledge of hardware limitations to guide the future direction of our CGH‑pipeline.

• A Master’s in Electronic Engineering, Scientific Computing or an equivalent discipline, with a focus on algorithm design and/or hardware implementation.

• A proven track record of developing fixed‑point C or MATLAB models from a floating‑point MATLAB reference to match, debug and verify a hardware implementation on FPGA.

• A deep experience in balancing area, power, and latency trade‑offs, and optimally modify both algorithm and implementation to meet system‑level requirements. You see early on what the difficulties in hardware will be, and have acquired a mindset for solving them.

• With a meticulous eye for detail, you thrive on matching models to hardware bit‑by‑bit. Your excellent interpersonal and communication skills allow you to relay your findings to your colleagues in a clear yet concise way.

• Agile Mindset:
  You are a true team player who adapts quickly to the "volatile" nature of a cutting‑edge R&D pipeline where prototypes change as fast as the technology evolves.

• Experience with System
  
  C design flows for system‑level verification.

• Prior work on video or display chipsets.

• Basic knowledge of RTL (or equivalent) and/or C++.

Applicants must be currently authorized to work in Belgium on a full‑time basis. No visa sponsorship is available for this position.

Location:

This role is based in Leuven, Belgium.

Ready to shape the future? Join us in building holographic technology that will change how the world sees, works, and connects.