Beyond Moore Computational Research Scientist

Beyond Moore Computational Research Scientist

Join to apply for the Beyond Moore Computational Research Scientist role at Berkeley Lab

$94,740.00/yr - $/yr

Berkeley Lab’s Applied math and Computational Sciences Division has an opening for a Beyond Moore Computational Research Scientist to evaluate and develop devices to hardware/circuit co‑design flow for architectural specializations for high performance computing neuromorphic and edge computing applications.

In the absence of Moore’s Law Scaling, the DOE must investigate alternative paths to continuing computing performance improvements for scientific applications through architectural specialization. Since the beginning of the microchip, we have become accustomed to Moore’s Law relentlessly delivering a doubling of performance, energy efficiency, and density for high‑performance computing (HPC) (and all electronic devices) every 18–24 months. This expectation has led to a relatively stable ecosystem built around general‑purpose processor technologies such as the x86, ARM, and Power instruction set architectures.

However, with the tapering of lithography improvements, shrinking transistors can no longer be relied on exclusively to deliver continued performance improvements in digital electronics.

Absent a new transistor technology to replace CMOS, the primary opportunity for continued performance improvement for digital electronics and HPC is to make more efficient use of transistors through architecture specialization, application‑specific acceleration, and compilers/programming‑models that better control data movement than those available today. The successful applicant will contribute to the development and evaluation of novel heterogeneous devices based circuit design for extreme heterogeneous SoC (System on Chip) designs, and evaluate their merit for emerging computational workloads for the purpose of maximizing performance and energy efficiency.

This work will have a broad impact on high performance and other larger‑scale computing for critical applications for society and science. The successful applicant will need to have expertise with computer architecture and processor design from the ground up, and have skills in Spice analog/digital circuit design, Verilog and use of CAD/EDA tools; it is also beneficial if the candidate has experience with full tape‑out experience of ASICs.

Using those skills, the successful applicant will design post‑Moore device‑based compute, memory, or data transfer blocks for key application kernels to demonstrate the merit of this approach. The applicant will also make key intellectual contributions and consequently publish papers to the emerging field of extreme heterogeneous computing and domain‑specific specializations. Knowledge of processor design techniques like Logic‑In‑Memory/In‑Memory Computing, Spiking Neural Network (SNN) architectures and multivalued logic design techniques is a bonus.

• Design circuits, hardware accelerators and processor architectures using post‑Moore devices to accelerate key HPC applications and application kernels.
• Develop compact models and methodologies to use these circuits for performance and energy characterizations which can be used in architectural simulation framework for tightly integrating these accelerators into heterogeneous systems and SoCs that may contain multiple different kinds of accelerator devices.
• Identify opportunities and challenges for devices to architectural design space exploration for several post‑Moore devices to address those bottlenecks and develop circuit design models to determine the performance potential for those solutions.
• Develop architectural and circuit models for emulation in FPGA hardware.
• Develop metrics and benchmark tests to compare conventional CMOS‑based processors/accelerators and enhanced post‑Moore device‑based computational accelerators for key HPC applications and algorithms.
• Publish work in academic journals and present it at conferences and workshops.
• Lead and assist in the preparation of proposals for funding.
• Mentor graduate students and postdocs.

• PhD or equivalent in a Computing…