Process Engineer, EUV

For more than 50 years, Photronics has been a global leader in photomask technology — enabling the innovation behind smartphones, computers, automotive electronics, and countless other devices used every day. Our success is driven by advanced technology, strong customer partnerships, and most importantly, our people.

Join Photronics and be part of a collaborative, high-tech manufacturing environment where learning, engineering excellence, and continuous improvement are core to everything we do.

The Program Manager, EUV is responsible for optimizing and sustaining EUV lithography in high-volume manufacturing. This hands‑on position focuses on resolving yield, defect‑control, and throughput challenges to deliver world‑class photomasks for advanced logic and memory nodes. The role involves driving process improvements and enabling the production of next‑generation technology.

• Photronics – Boise, Idaho (US). This is an on‑site position. Remote work is not available for this role.
• This facility is a government trusted facility. Applicants selected for this position will be required to apply for and maintain a Department of Defense Secret Clearance. In accordance with U.S. government security requirements, only U.S. citizens are eligible to hold DOD Secret Clearance.

• Lead EUV lithography process development from baseline to stable high‑yield production.
• Own day‑to‑day EUV lithography process performance, including exposure dose control, focus optimization, overlay performance, CDU, LWR/LER, and defectivity.
• Develop, qualify, and sustain EUV process recipes across development, pilot, and high‑volume manufacturing environments.
• Establish and maintain robust EUV process windows through systematic experimentation, data analysis, and control methodology.

• Actively support EUV exposure tools with hands‑on engagement across key subsystems, including source power, projection optics, illumination control, and reticle handling.
• Partner with equipment engineering and vendors to troubleshoot tool‑process interactions impacting yield, throughput, or stability.
• Support tool qualifications, matching, upgrades, and process change management activities.

• Lead EUV resist process optimization, including resist selection, bake conditions, post‑exposure processes, and sensitivity tradeoffs.
• Address EUV‑specific patterning challenges such as stochastic defects, shot noise, bridge defects, missing contacts, and local CDU variation.
• Evaluate and mitigate contamination and defect sources associated with EUV pellicles, masks, and exposure environments.
• Collaborate with metrology and defect inspection teams to correlate EUV exposure conditions with measurement results using CD‑SEM and actinic/non‑actinic tools.

• Apply SPC, Design of Experiments (DOE), and yield analytics to identify tool drift, process excursions, and latent yield risks.
• Produce and maintain high‑quality technical documentation, including process specifications, control plans, and root‑cause analyses.
• Train engineers and operators on EUV‑specific process fundamentals, tool sensitivities, and best‑known methods (BKM).

• Proven ability to tune and control resist processes, wafer alignments, and critical dimension (CD) uniformity control.
• Competence with SPC, DOE, and yield enhancement methodologies.
• Strong analytical skills with data review tools such as Excel, JMP, Python, or SQL.
• Proficiency with reading mechanical, optical, and process schematics.
• Excellent communicator; able to explain complex technical issues to peers and leadership.
• Self‑starter who thrives in fast‑paced environments and can drive projects to closure.

• 6+ years of semiconductor process engineering experience, with a significant portion focused on lithography or patterning.
• Hands‑on experience with EUV lithography processes and tooling (strongly preferred) or equivalent photolithography (193nm/immersion).
• Experience with metrology and defect inspection…