Sr MOL Engineer - DRAM Process Integration
Listed on 2026-05-31
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Engineering
Process Engineer, Electrical Engineering, Materials Engineer, Electronics Engineer
Responsibilities
- Support MOL process flow development, optimization, and integration for advanced DRAM technologies.
- Assist in troubleshooting integration issues across MOL process modules (contact etch, silicide, contact fill, local interconnect, liner/barrier).
- Collect, analyze, and interpret process and electrical data (contact resistance, leakage, yield) to drive improvement.
- Collaborate with cross‑functional teams—MOL, Cap, module engineers, device engineers, reliability, and manufacturing—to resolve technical challenges at the MOL interface.
- Participate in technology transfer activities from R&D to pilot production.
- Contribute to design‑of‑experiment (DOE) planning, execution, and analysis for contact and local interconnect modules.
- Support pathfinding efforts for next‑generation MOL architectures, materials, and contact scaling solutions.
- MS/PhD (preferred)/BS (required) in Electrical Engineering, Materials Science, Chemical Engineering, Microelectronics, Physics, Chemistry, or related field with coursework or research in thin films, interconnect technology, or nanofabrication.
- Foundational understanding of semiconductor fabrication processes (thin film deposition, etch, lithography, CMP).
- Familiarity with MOL concepts: contact formation, silicide, local interconnect, liner/barrier films, contact resistance.
- Hands‑on experience with deposition techniques (CVD, ALD, PVD) or etch processes.
- Exposure to DRAM or memory device technology paired with experience with process integration, yield improvement, or reliability testing.
- Internship or co‑op experience in a semiconductor fab or R&D environment paired with experience with DOE (Design of Experiments) methodology.
- Knowledge of contact metallurgy: tungsten, cobalt, ruthenium, or other contact metals, paired with familiarity with silicide processes (TiSi, CoSi, NiSi) or metal‑semiconductor interfaces.
- Understanding of high‑aspect‑ratio contact etch and fill challenges.
- Willingness to learn, adapt, and work in a fast‑paced R&D environment paired with proficiency in statistical analysis tools.
- Knowledge of semiconductor reliability concepts (electromigration, contact degradation, stress voiding).
- Semiconductor Process Engineer 3 - Semiconductor Process Engineer 4
TBD
BenefitsMicron benefits are designed to help you stay well, provide peace of mind, and help you prepare for the future. We offer a choice of medical, dental, and vision plans in all locations, enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.
Additionally, Micron benefits include a robust paid time‑off program and paid holidays.
Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.
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