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Process Integration Lead, APTD

Job in Boise, Ada County, Idaho, 83708, USA
Listing for: Micron Technology, Inc
Full Time position
Listed on 2026-05-31
Job specializations:
  • Engineering
    Process Engineer, Materials Engineer, Manufacturing Engineer, Electrical Engineering
Salary/Wage Range or Industry Benchmark: 120000 - 150000 USD Yearly USD 120000.00 150000.00 YEAR
Job Description & How to Apply Below

Req  Process Integration Lead, APTD

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Department Intro:
The Technology Development (TD) department at Micron Technology is at the forefront of innovation, driving the advancement of memory and storage solutions that transform how the world uses information. This team is dedicated to developing innovative processes and technologies that enable the creation of next‑generation semiconductor products. By collaborating closely with our global R&D and manufacturing teams, we ensure the efficient transfer and implementation of new technology nodes, maintaining Micron’s leadership in the industry.

Join this forward‑thinking team that is molding the future of technology!

Position Overview

As a Process Integration Lead in the Advanced Packaging Technology Development (APTD) team, you will lead a team of experienced engineers developing advanced wafer level and die level interconnect technologies. You will ensure targeted products meet performance, cost, manufacturability, quality, reliability, and schedule requirements. You will also work with peers and internal partners across organizations to coordinate the transfer of new integration flows to High Volume Manufacturing (HVM) sites.

You will be recognized as an authority in broader integration areas by peers in the manufacturing and technology development organizations. The ideal team member would be adept to accepting change and volatility and operate with a sense of urgency. Apply sound engineering principles and judgment, seek advice from authorities, and make critical and timely decisions. You will need to advise and lead the work of others and ensure good communication, engagement, and accountability leading to the achievement of the program goals.

Responsibilities
  • Drive process innovation to deliver high‑impact, scalable technology solutions.
  • Define and integrate highly sophisticated, vertically aligned process flows.
  • Develop innovative solutions and establish robust contingency plans.
  • Define and complete the Compose of Experiments (CoE) using data‑driven methodologies.
  • Apply structured problem‑solving and decision‑making methods (Kempner‑Tregoe or equivalent).
  • Champion cost efficiency while balancing performance, quality, and reliability.
  • Communicate effectively across teams, sites, and executive leadership.
  • Coach and mentor engineers and technicians while promoting a growth mindset through continuous learning and multi‑functional collaboration.
Required Experience
  • Over 10 years of professional experience within the semiconductor industry.
  • MS or PhD in Electrical Engineering, Materials Science, Mechanical Engineering, Physics, Chemistry, or a closely related field, or equivalent professional experience demonstrating senior‑level technical capability.
  • Professional experience in process integration, process development, advanced packaging, or closely related semiconductor technology domains within an R&D environment (IDM, foundry, OSAT, or equivalent).
Preferred Qualifications
  • Professional experience in process integration, process development, advanced packaging, or similar semiconductor technology areas within an R&D environment (IDM, foundry, OSAT, or equivalent).
  • Proven end‑to‑end ownership of integration solutions, including technology definition, process development, qualification, and transfer to high‑volume manufacturing.
  • Deep, hands‑on experience with advanced packaging and interconnect technologies, including 2.5D/3

    DIC integration; wafer‑level and fan‑out packaging; and wirebond, microbump, and/or hybrid bonding.
  • Proven record of direct technical ownership of solutions (hands‑on execution encouraged; oversight‑only experience is insufficient).
  • Strong semiconductor technology background with experience in memory (DRAM, NAND) and/or logic devices.
  • Ability to thrive in fast‑paced, ambiguous R&D settings through robust process integration problem‑solving abilities, including DoE, data‑driven decision‑making, root‑cause analysis, and structured approaches (e.g., KT or equivalent).
Job Profile(s)

Semiconductor Process Eng MTS - Semiconductor Process Eng DMTS

Relocation Level: TBD

Benefits

Micron offers medical, dental, vision plans, income protection, paid time‑off program, paid holidays, and family leave.

EEO Statement

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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