Process Integration Lead, APTD

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Department Intro:

The Technology Development (TD) department at Micron Technology is at the forefront of innovation, driving the advancement of memory and storage solutions that transform how the world uses information. This team is dedicated to developing innovative processes and technologies that enable the creation of next-generation semiconductor products. By collaborating closely with our global R&D and manufacturing teams, we ensure the efficient transfer and implementation of new technology nodes, maintaining Micron's leadership in the industry.

Join this forward-thinking team that is molding the future of technology!

Position Overview:

As a Process Integration Lead in the Advanced Packaging Technology Development [APTD] team, your responsibilities will include but are not limited to leading a team of experienced engineers in the development of advanced wafer level and die level interconnect technologies. Successful technology development includes ensuring that targeted products meet performance, cost, manufacturability, quality, reliability and schedule requirements. Also, you will have responsibility to work with peers and internal partners across organizations to coordinate the transfer of new integration flows to High Volume Manufacturing [HVM] sites.

You will be recognized as an authority in broader integration areas by peers in the manufacturing and technology development organizations. The ideal team member would be adept to accepting change and volatility and operate with a sense of urgency. Apply sound engineering principles and judgment, seek advice from authorities, and make critical and timely decisions. You will need to advise and lead the work of others and ensure good communication, engagement, and accountability leading to the achievement of the program goals.

Responsibilities:

* Drive process innovation for outstanding solutions and technology

* Vertical integration capability to define highly sophisticated process flows

* Develop, innovate and establish contingency plans

* Define and Implement Design of Experiment (DoE)

* Perform Kempner-Tregoe (KT) or KT-like problem-solving & decision-making process

* Passionate about cost efficiency

* Communications - same site, site-to-site and Executive leadership

Coaching & mentoring

* Coaching & mentoring early/mid-career engineers & technicians

* Teaching classes as needed

Growth mindset

* Continue to build new skills through development goals & learning events

* Seek out opportunities to work multi-functionally, build a network, & gain competency across domains

Required Experience:

* 10+ years of professional experience in the semiconductor industry.

* MS or PhD in Electrical Engineering, Materials Science, Mechanical Engineering, Physics, Chemistry, or a closely related field, or equivalent professional experience demonstrating senior‑level technical capability.

* Professional experience in process integration, process development, advanced packaging, or closely related semiconductor technology domains within an R&D environment (IDM, foundry, OSAT, or equivalent).

Additional Qualifications (Preferred)

We recognize that highly qualified candidates may not meet every qualification listed below. Candidates whose experience aligns with most of these qualifications and who bring strong process integration and technical development leadership are encouraged to apply.

* End‑to‑end ownership of integration solutions, including technology definition, process development, qualification, and successful transfer to high‑volume manufacturing.

* Deep, practical expertise in advanced packaging and interconnect technologies, such as:

* 2.5D and 3

DIC integration

* Wafer‑level and fan‑out packaging

* Wirebond, microbump, and/or hybrid bonding

Experience should reflect direct technical ownership, not oversight alone.

* Strong semiconductor technology background, with…