RTL Design Engineer Boise, Idaho

Position: RTL Design Engineer Boise, Idaho, United States of America
## RTL Design Engineer Boise, Idaho, United States of America
** Our vision is to transform how the world uses information to enrich life for
* all*.
** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
** Job Summary
** Micron Technology seeks an RTL Build Engineer to develop DRAM digital blocks from specification through RTL implementation with strong emphasis on power-efficient, implementation-aware building. In this role, you will work hands-on with synthesis and timing/power analysis tools to develop power, performance, and area (PPA) trade-offs. You will collaborate with multi-functional teams to improve the quality of advanced memory products.
** Responsibilities
* ** Develop and implement RTL for DRAM digital and mixed-signal blocks using RTL-to-GDS flows.
* Design power- and area-efficient RTL with a focus on reducing switching activity, clock power, and leakage.
* Perform front-end quality checks including lint, CDC/RDC, synthesis, UPF, and timing QoR.
* Complete RTL- and gate-level power and timing evaluation to identify and resolve PPA bottlenecks.
* Collaborate with verification, synthesis, and physical design teams to achieve timing closure and design targets.
** Minimum Qualifications
*** Master’s degree in Electrical Engineering with 3+ years of experience, or Bachelor’s degree with 4+ years of pre-silicon RTL design experience.
* Experience developing RTL for complex digital IP from specification through implementation handoff.
* Hands-on experience with ASIC low-power methodologies including UPF-based power intent and CDC/RDC analysis.
* Strong understanding of ASIC front-end flows including RTL design, synthesis, and static timing analysis.
* Proficiency in Verilog/System Verilog and industry-standard simulation tools.
** Preferred Qualifications
*** Hands-on experience with RTL and gate-level power analysis using tools such as Design Compiler and Prime Time.
* Understanding of low-power design techniques including clock gating, power gating, and multi-voltage designs.
* Experience collaborating across RTL, verification, synthesis/STA, and physical design teams.
* Familiarity with CMOS digital and mixed-signal circuit concepts and their system-level trade-offs.
* Experience with memory or high-performance digital build is preferred.

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.  We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.  

Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.  Additionally, Micron benefits include a robust paid time-off program and paid holidays.  For additional information regarding the Benefit programs available, please see the Benefits Guide posted on .Micron is proud to be an equal opportunity workplace and is an affirmative action employer.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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