Prinicpal RTL DESIGN Boise, Idaho

Position: PRINICPAL RTL DESIGN Boise, Idaho, United States of America
## PRINICPAL RTL DESIGNBoise, Idaho, United States of America
** Our vision is to transform how the world uses information to enrich life for
* all*.
** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
** Job Summary
** Micron Technology is seeking a Principal RTL Design Engineer to lead the development of high-quality DRAM digital and mixed-signal IP. In this role, you will be responsible for the full RTL design lifecycle—from architecture and implementation through signoff—while delivering designs that meet aggressive power, performance, and area (PPA) targets. This position is in Boise, Idaho, offering strong opportunities for technical leadership, innovation, and collaboration across global teams.
** Responsibilities
* ** Own and drive RTL design for DRAM digital and mixed-signal IP from specification through silicon-ready signoff.
* Architect and deliver high-performance, power- and area-efficient RTL designs aligned with product requirements.
* Perform and sign off front-end quality checks, including lint, CDC/RDC, synthesis, UPF, and timing QoR.
* Collaborate closely with physical design, verification, and architecture teams to achieve timing closure and PPA goals.
* Improve design quality and efficiency by refining methodologies, driving automation, and enhancing RTL design flows.
** Minimum Qualifications
*** Master’s degree in Electrical Engineering with 8+ years of experience, or Bachelor’s degree with 10+ years of pre-silicon RTL design experience.
* Proven ownership of complex RTL/IP development from micro-architecture definition through handoff to physical design.
* Strong experience with ASIC low-power design methodologies, including UPF-based power intent and power-aware CDC/RDC.
* In-depth knowledge of RTL design, logic synthesis, functional verification, and static timing analysis (STA).
* Proficiency in Verilog/System Verilog and industry-standard simulation and front-end tools.
** Preferred Qualifications
*** Extensive background in DRAM or other memory compose architectures and development.
* Deep knowledge of CDC, RDC, STA, and low-power techniques in advanced ASIC technology nodes.
* Experience designing complex digital logic and/or mixed-signal-interfacing circuits.
* Familiarity with CMOS digital and analog-integrated circuit concepts and their system-level impact.
* Excellent interpersonal skills with the ability to influence multi-functional teams and technical leadership.

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.  We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.  

Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.  Additionally, Micron benefits include a robust paid time-off program and paid holidays.  For additional information regarding the Benefit programs available, please see the Benefits Guide posted on .Micron is proud to be an equal opportunity workplace and is an affirmative action employer.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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