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DRAM Layout Engineer — Cadence, Physical Design

Job in Boise, Ada County, Idaho, 83708, USA
Listing for: Micron Technology, Inc.
Full Time position
Listed on 2026-07-01
Job specializations:
  • Engineering
    Electronics Engineer, Hardware Engineer, Engineering Design & Technologists, Systems Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 110000 USD Yearly USD 80000.00 110000.00 YEAR
Job Description & How to Apply Below

Micron Technology, Inc. in Boise, Idaho is seeking a Layout Engineer to shape block-level layouts and guide physical design strategies. This role involves close collaboration and direct influence on DRAM product reliability.

The ideal candidate has experience in Cadence Virtuoso, ensuring compliance with DRC and LVS. Micron offers a choice of health, vision, and dental plans, along with features to support your overall well-being.

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