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DRAM Layout Engineer — Cadence Virtuoso Expert
Job in
Boise, Ada County, Idaho, 83708, USA
Listed on 2026-07-24
Listing for:
Micron Memory Malaysia Sdn Bhd
Full Time
position Listed on 2026-07-24
Job specializations:
-
Engineering
Electronics Engineer, Systems Engineer, Hardware Engineer, Engineering Design & Technologists
Job Description & How to Apply Below
Micron Technology in Boise, Idaho is seeking a Layout Engineer to shape block-level layouts, guide physical design strategies, and influence DRAM product reliability.
You will build block-level layouts in Cadence Virtuoso, apply layout methods, verify against DRC/LVS, and support parasitic extraction and ECOs. A cross-site collaboration mindset is essential to drive quality across generations.
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