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Senior RTL Design Architect - DRAM IP & Signoff

Job in Boise, Ada County, Idaho, 83708, USA
Listing for: Micron Memory Malaysia Sdn Bhd
Full Time position
Listed on 2026-07-24
Job specializations:
  • Engineering
    Hardware Engineer, Electronics Engineer, Engineering Design & Technologists
  • Design & Architecture
    Engineering Design & Technologists
Salary/Wage Range or Industry Benchmark: 140000 - 210000 USD Yearly USD 140000.00 210000.00 YEAR
Job Description & How to Apply Below

Micron Technology in Boise, Idaho is seeking a Principal RTL Design Engineer to lead the development of high-quality DRAM digital and mixed-signal IP. You will own RTL design from architecture to silicon signoff, targeting best-in-class power, performance, and area.

Collaborate with physical design, verification, and architecture teams to meet aggressive PPA goals, drive automation, and advance RTL design methodologies while mentoring teams across global sites and delivering results.

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Position Requirements
10+ Years work experience
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