Lead DRAM RTL Design Engineer - PPA Mastery
Job in
Boise, Ada County, Idaho, 83708, USA
Listed on 2026-08-10
Listing for:
Micron Technology
Full Time
position Listed on 2026-08-10
Job specializations:
-
Engineering
Hardware Engineer, Electronics Engineer, Test Engineer, Systems Engineer
Job Description & How to Apply Below
Micron Technology is seeking a Principal RTL Design Engineer to lead the RTL design lifecycle for DRAM IP, from architecture through signoff, at our Boise, Idaho site. You will drive high-performance, power- and area-efficient RTL solutions and partner with physical design, verification, and architecture teams to meet tight PPA targets.
The role requires strong Verilog/System Verilog skills, ASIC low-power experience (UPF), and a track record of pre-silicon RTL/IP ownership.
#J-18808-LjbffrTo View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
Search for further Jobs Here:
×