Senior​/Principal Package Design Engineer

Senior Package Design Engineer

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

At Micron, we're not just designing chips. We're building the physical architecture that powers artificial intelligence, accelerates cloud computing, enables autonomous vehicles, and connects the world through mobile and edge devices. Every breakthrough in AI — from large language models to next-generation data centers — runs on memory. And every bit of that memory lives inside a package that someone like you designs!

We're looking for a Senior Package Design Engineer who is passionate about advanced semiconductor packaging and ready to lead at the intersection of silicon, system, and scale. This is a high-impact, highly visible role where you'll work across the full product lifecycle — from early-stage co-design with silicon teams all the way to High Volume Manufacturing (HVM). If you thrive where precision meets innovation, where your decisions shape products reaching millions of users worldwide, and where your expertise directly influences how the AI era unfolds — this role is for you!

Responsibilities:

• Lead Co-Design from Silicon to System
• Own Package Layout and Architecture
• Drive Electrical and Physical Design Quality
• Collaborate Globally to Scale and Sustain

Minimum Qualifications:

• Bachelor's degree in Electrical Engineering, Mechanical Engineering, Materials Science, or related field + 5 years of semiconductor package design experience
• OR Master's degree in the above fields + 3 years of semiconductor package design experience
• Hands-on proficiency with advanced package EDA tools such as Cadence Allegro Package Designer+, Cadence Integrity 3D-IC, or Siemens/Mentor Xpedition
• Experience with flip chip, wire bond interconnects, BEOL/RDL flows, substrate stack-ups, and high-density routing
• Experience partnering with SI/PI simulation teams to drive package architecture and design optimization
• Experience collaborating with OSAT partners or assembly engineering organizations to deliver designs through HVM

Preferred Qualifications:

• 7 plus years of proven experience with advanced DRAM technologies — LPDDR, HBM, or GDDR
• Experience with TSV stacking, micro-bump layout, and Chip-Package Interaction (CPI) analysis
• Familiarity with 2.5D/3D-IC, Fan-Out Wafer Level Packaging (FOWLP), and System-in-Package (SiP)
• Experience with Assembly DOE definition, DFMEA reviews, and process/material development in HVM
• Proficiency with AutoCAD / Autodesk Mechanical for package and interposer drawings
• Experience leading co-design engagements and silicon floorplan optimization

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.