Senior CAD Engineer, ASIC Development Infrastructure, RTL Design

Senior Computer Aided Design (CAD) Engineer

Amazon Lab
126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab
126 began in 2004 as a subsidiary of , Inc., originally creating the best-selling Kindle family of products. Since then, we have produced innovative devices like Fire tablets, Fire TV and Amazon Echo. What will you help us create?

The Role:

As a Senior Computer Aided Design (CAD) Engineer, you will be part of an advanced ASIC development team that is creating the semiconductor designs which will power millions of new Amazon devices. You will work closely with multi-disciplinary groups including Design, Verification, Physical Design, and Emulation teams to build and maintain a leading-edge ASIC development infrastructure that enables and accelerates their work.

Key

Job Responsibilities:

• Design and maintain ASIC development flows spanning RTL-to-GDSII, including RTL generation, simulation, synthesis, place & route, timing analysis, DRC/LVS, and sign-off
• Deploy and configure EDA tools from vendors (Synopsys, Cadence, Mentor/Siemens, etc.) across compute infrastructure
• Develop automation and CI/CD/regression to streamline design tasks, reduce manual effort, and improve consistency
• Troubleshoot tool issues and work with vendors to resolve bugs, performance bottlenecks, or licensing problems
• Work with IT teams to optimize compute and storage strategies to enhance engineering efficiency
• Create and maintain documentation for tool usage, flow methodologies, and best practices
• Utilization of AI tools to accelerate troubleshooting and monitoring of design flows

A Day In The Life:

Your day starts by reviewing overnight build results and addressing any tool flow failures that blocked design teams. You'll troubleshoot issues, working directly with EDA vendors when needed to resolve bugs or performance bottlenecks. Mid-morning, you might deploy an updated version of a critical tool across the compute infrastructure, then spend time developing automation to streamline repetitive tasks. Afternoons often involve collaborating with Design, Verification, and Physical Design teams to optimize their workflows, and working with the Design Technology team on large-scale tool objectives.

Throughout the day, you'll balance immediate firefighting with longer-term infrastructure improvements—your ultimate goal is making a large team of chip design engineers more efficient through seamless tool flows that power millions of Amazon devices.