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Sr Design Readiness Engineer

Job in Boise, Ada County, Idaho, 83708, USA
Listing for: 1000 Micron Technology, Inc.
Full Time position
Listed on 2026-09-05
Job specializations:
  • Engineering
    Test Engineer, Quality Engineering
Salary/Wage Range or Industry Benchmark: 140000 - 210000 USD Yearly USD 140000.00 210000.00 YEAR
Job Description & How to Apply Below

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Key Responsibilities
  • Lead pre-silicon readiness activities across new DRAM products, including risk assessment, DFMEA preparation, validation planning, and readiness reviews with cross-functional engineering teams.
  • Partner closely with Design, Verification, Component Validation, Product Engineering, Product Architecture, System Compatibility Group, and Silicon Strategy teams to identify product risks, define validation coverage, and align debug priorities.
  • Apply strong technical judgment to analyze circuit behavior, silicon data, validation results, failure signatures, and product-level interactions across design, test, and manufacturing flows.
  • Drive structured investigation and resolution of silicon findings, including root-cause analysis, experiment planning, evidence review, and alignment of mitigation or screen strategies to project milestones.
  • Influence product readiness decisions by connecting design intent, silicon behavior, validation results, manufacturing constraints, and customer quality expectations.
  • Mentor engineers, strengthen technical practices, and help capture lessons learned that improve execution, product robustness, and organizational readiness across future DRAM programs.
  • Apply AI-enabled ways of working to improve engineering productivity, including use of approved AI tools for technical research, data synthesis, debug planning, experiment tracking, documentation, and communication, while ensuring outputs are reviewed, validated, and governed by sound engineering judgment.
Qualifications and

Preferred Experience
  • Advanced technical background in electrical engineering, computer engineering, semiconductor engineering, applied physics, materials science, or a closely related field. PhD, MS, or equivalent depth of industry experience is highly valued.
  • Strong relevant experience in semiconductor design, DRAM or memory technology, silicon validation, product engineering, device characterization, circuit debug, reliability, test development, or new product introduction.
  • Demonstrated ability to analyze complex technical problems using silicon data, validation results, schematics, circuit behavior, failure analysis, statistical evidence, and cross-functional input.
  • Experience leading technical investigations, driving root-cause analysis, defining experiments, and influencing mitigation strategies across design, validation, test, or manufacturing teams.
  • Strong communication skills with the ability to explain complex technical issues clearly to engineering peers, cross-functional partners, and leadership.
  • Proven ownership, technical curiosity, and ability to operate effectively in ambiguous, fast-moving product development environments.
  • Experience mentoring engineers, leading technical work streams, or shaping cross-functional engineering practices is strongly preferred.
  • AI proficiency or demonstrated ability to effectively use approved AI-enabled tools for engineering analysis, technical documentation, workflow automation, knowledge management, and productivity improvement is preferred.
Team Culture and Growth Opportunity

Our team focuses on technical excellence, disciplined execution, continuous learning, inclusive collaboration, and AI-enabled ways of working. We are looking for experienced engineers who want to apply their depth to meaningful product challenges while continuing to expand their influence across DRAM design readiness, validation, silicon learning, manufacturing readiness, and the future of engineering productivity. This role is well suited for candidates who have built strong technical depth through industry experience, graduate research, or a combination of both, and who are motivated to use that expertise to shape product readiness outcomes across advanced memory programs.

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