Director​/DMTS, Process Integration Lead – Advanced Packaging; .5D​/3D, HBM, Hybrid Bonding

Department Intro:

We are advancing the future of semiconductor packaging through innovative 2.5D, 3D, and heterogeneous integration technologies. Our team develops the processes that enable next-generation AI and high-performance computing products, working across materials, device, design, manufacturing, and test engineering to solve complex technical challenges. If you're excited by emerging packaging architectures and breakthrough integration approaches, you'll find meaningful opportunities to make an impact here.

As a Process Integration Lead for Advanced Packaging, you will lead a team focused on developing and integrating advanced packaging technologies from concept through full-scale manufacturing. This role plays a critical part in enabling high-performance multi-die solutions by driving technology development, process integration, technology transfer, and collaborative execution. You will help shape the roadmap for next‑generation packaging platforms while mentoring a highly skilled technical team.

• Manage and grow a team responsible for seamless process integration across 2.5D and 3D packaging platforms, including advanced interconnect architectures, die‑stacking solutions, and HBM implementation.
• Spearhead the development, optimization, and qualification of emerging packaging technologies through experimental design (DOE), process analysis, performance validation, and establishment of design rules.
• Improve yield, reliability, and performance using defect analysis, electrical and physical characterization, SPC, and data‑driven root cause investigation.
• Lead technology transfer from development to manufacturing, including materials qualification, process readiness, baseline characterization, and validation planning.
• Partner with design, process, equipment, reliability, test, and manufacturing teams to deliver advanced packaging solutions and scale proven methodologies across global organizations.
• Warpage engineering: predict and mitigate wafer/die warpage via modeling, cure‑shrinkage controls, and material/process levers; validate with inline metrology.

• Bachelor’s degree in Materials Engineering, Chemical Engineering, or a related field with 15+ years of experience to include advanced packaging technology development, 2.5D, 3D stacking, and HBM integration.
• Experience with advanced interconnects, TSVs, die stacking, underfill, molding, bonding, and package integration processes.
• Experience with hybrid bonding integration (W2W/C2W) and HBM‑to‑logic integration, including thermal optimization.
• Experience defining AI‑enabled engineering workflows, developing automation agents, or applying AI tools to semiconductor development.
• Experience leading collaborative technical teams and driving complex engineering programs to completion.

• Master’s degree or PhD.
• Experience developing and scaling advanced packaging technologies from research and development through full‑scale manufacturing.
• Expertise in yield analysis, statistical process control, defect reduction, and data‑driven process optimization.
• Experience with warpage modeling, material characterization, and package reliability qualification.
• Author or contributor to technical publications, patents, or industry presentations related to advanced packaging technologies.

Semiconductor Process Eng SMTS - Semiconductor Process Eng DMTS

Relocation Level: TBD

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