Signal Integrity Engineer
Listed on 2026-02-08
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Engineering
Electronics Engineer, Electrical Engineering, Systems Engineer, Hardware Engineer
Overview
We are seeking a Senior Signal Delivery Engineer to join the Innovation Lab – the team responsible for developing breakthrough concepts for use in Semiconductor Test Systems of the future. This role is critical in ensuring high-performance signal integrity across advanced semiconductor interfaces, including UCIe-based architectures and microbump interconnects. You will be instrumental in shaping the future of chiplet-based systems, fine pitch probing, and high-speed interconnects.
This will be a permanent full-time position which offers a competitive and comprehensive benefits package including medical, dental and vision plans, 401(K), company paid holidays, sick leave and vacation time. Estimated Salary Range $150K-$220K. This role will be fully onsite in the North Reading, MA office.
Responsibilities- Lead the design and analysis of high-speed signal delivery systems supporting high speed industry data interfaces such as PCIe, UCIe, etc.
- Develop simulation models and perform signal integrity analysis to ensure robust performance across various operating conditions.
- Collaborate with cross-functional teams including packaging, PCB layout, and silicon design to optimize signal paths and microbump connections.
- Build and validate prototypes to test signal delivery performance and compliance of system probe card interfaces including microbump and fine pitch probing specifications.
- Support product development from concept through production, ensuring signal integrity and reliability.
- Ensure compliance with industry standards and internal quality metrics.
- Drive PCB design efforts involving very large panels, high layer count sequential builds, and fine pitch sequential lamination.
- Lead development of ultra-fine pitch MLO (Multi-Layer Organic) substrates with embedded active and passive components.
- Bachelor’s or Master’s degree in Electrical Engineering or related field.
- Minimum 7 years of experience in signal integrity or high-speed hardware design.
- Proven experience with signal delivery in advanced semiconductor systems.
- Strong working knowledge of interconnect standards.
- Experience working with microbump technology and its impact on signal integrity.
- Familiarity with fine pitch probing techniques and associated challenges.
- Proficiency in simulation tools such as Ansys HFSS, SIwave, ADS, or equivalent.
- Experience with PCB layout tools and design for signal integrity.
- Familiarity with lab equipment for signal validation (oscilloscopes, TDR, VNA).
- Preference for candidates with experience in chiplet-based and UCIe system design.
- Preference for candidates with experience in MEMS needle array technology.
- Preference for candidates with experience in cross-functional hardware development.
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