Senior QPU Software Engineer

Senior FPGA Engineer – Quantum Computing Control Systems

Join QuEra Computing's engineering team to develop cutting-edge FPGA systems for neutral atom quantum computers. You'll work on real-time control systems that manipulate individual atoms with microsecond precision, enabling breakthrough quantum algorithms and applications.

We're seeking a Senior FPGA Engineer to design, implement, and optimize high-performance FPGA systems for quantum computing applications. You'll work on complex real-time control systems, high-speed data acquisition, and precision timing systems that are critical to our quantum computer's operation.

• Design and implement System Verilog modules for quantum control systems including:
• Scheduled multi-tone generators for RF/microwave quantum gates
• High-speed ADC/DAC interfaces (16-bit, 4 samples/clock)
• Hardware-accelerated image processing for atom detection
• Develop and maintain Ultra-board FPGA designs (Xilinx Zynq Ultra Scale+ RFSoC)
• Implement high-speed serial interfaces (CoaXPress, Aurora, AXI4-Stream)
• Design clock domain crossing logic with proper CDC verification
• Optimize resource utilization and timing closure for complex designs
• Implement formal verification for critical timing constraints
• Design and validate real-time trigger and synchronization systems
• Troubleshoot hardware-software integration issues

• Optimize data throughput for high-bandwidth quantum control signals
• Design robust clocking architectures for multi-domain systems
• Develop monitoring and diagnostics for system health
• Ensure deterministic timing for quantum gate operations

• 5+ years FPGA development experience with Xilinx Ultra Scale+ devices
• Expert-level System Verilog with modern verification methodologies
• Experience with high-speed serial protocols (Aurora, AXI4, PCIe, Ethernet)
• Real-time systems design with microsecond timing requirements
• Clock domain crossing design and verification
• Python programming for test automation and data analysis

• RF/microwave systems experience (frequency synthesis, phase-locked loops)
• High-speed ADC/DAC interfaces (JESD
  204B/C, RFSoC experience)
• Image processing algorithms (centroid detection, pattern recognition)
• CoaXPress or camera interface experience
• Familiar with High Level Synthesis and Vivado block design

• Verification: UVM, cocotb, pytest, formal verification
• Protocols: AXI4, AXI4-Stream, Aurora, CoaXPress, SPI, I2C
• Boards:
  Xilinx ZCU
  102/111/216, RFSoC platforms

• Quantum Gate Control: 8-channel RF tone generators with 0.1 Hz frequency resolution
• Precision Timing:
  Synchronized control sequences with