Senior Verification Architect - Interconnect & SoC

SiFive, Inc. is seeking a Senior Staff Design Verification Engineer to lead the verification of advanced cache-coherent interconnect subsystems for high-performance systems on chip (SoCs). This role requires strong expertise in System Verilog and significant experience in ASIC/SoC design verification.

The successful candidate will be responsible for defining verification strategies, developing robust environments, and mentoring team members to ensure high-quality verification. Compensation includes base pay, potential incentives, and a competitive benefits package.