More jobs:
HDL Technical Lead - Aerospace; FPGA
Job in
Boulder, Boulder County, Colorado, 80301, USA
Listed on 2026-02-16
Listing for:
iLocatum
Full Time
position Listed on 2026-02-16
Job specializations:
-
Engineering
Systems Engineer
Job Description & How to Apply Below
Location:
Boulder, CO
Salary Range:$150,000 – $250,000
Must-Have Qualifications- U.S. Citizenship with the ability to obtain a security clearance
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field
- Strong professional experience designing FPGA systems using Verilog, VHDL, or similar HDL
- Proven experience providing technical leadership or architectural ownership (not people management)
- Deep understanding of digital system design, timing analysis, and hardware interfaces
- Hands‑on experience with high-speed and control interfaces such as PCIe, SPI, I²C, AXI, Aurora, or JESD
- Ability to work across multiple programs and think at the system and platform level
A growing RF technology company is seeking an experienced HDL Technical Lead (FPGA) to provide architectural direction and technical leadership across multiple FPGA development programs. This role is ideal for a senior engineer who leads through technical expertise rather than formal people management. You will guide architecture, improve design reuse, and solve complex technical challenges while remaining hands‑on. Approximately 50% of the role is direct engineering
, including design, tooling, automation, and debugging. You will support 3–4 concurrent programs
, helping teams align on architecture, make sound technical tradeoffs, and execute consistently across projects.
- Provide technical leadership for FPGA/HDL development across multiple active programs
- Define and guide system‑level FPGA architecture aligned with program requirements and long‑term platform strategy
- Drive reuse of IP, architecture, and development tools to improve efficiency and consistency
Lead design reviews, technical planning, and cross‑team coordination to ensure quality and schedule - Contribute directly to:
- Specialized HDL development
- Tooling, automation, and workflow improvements
- Complex debugging, performance optimization, and timing closure
- Collaborate closely with RF, hardware, and embedded software teams to ensure successful system integration
- Provide technical mentorship, design feedback, and best‑practice guidance (no direct reports)
- Influence verification strategy, simulation approach, documentation standards, and integration readiness
- Support hardware bring‑up and system integration in Linux‑based environments
- Master’s degree in a related field
- Python, C/C++, or scripting for automation, test, or tooling
- Linux development experience (user space, drivers, Yocto, or Peta Linux)
- Experience with simulation and verification tools such as Vivado, Model Sim, or similar
- Hardware exposure including board bring‑up, lab debug, or schematic review
- Experience supporting multiple products or programs simultaneously
- Familiarity with HDL modeling or code‑generation tools
- Background working in RF or mixed‑signal systems
- Full‑time role (40+ hours as required)
- Standard weekday schedule with flexibility based on program needs
- Approximately 10% travel
- Professional office and lab environment with access to prototyping equipment, machine shop tools, and hardware development resources
- Four weeks of PTO annually
- Flexible scheduling and hybrid work options
- Tuition reimbursement
- Up to 6% 401(k) match
- Medical, dental, and vision coverage
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