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FPGA Design Eng

Job in Boulder, Boulder County, Colorado, 80301, USA
Listing for: Lockheed Martin
Full Time position
Listed on 2026-05-15
Job specializations:
  • Engineering
    Embedded Software Engineer, Systems Engineer, Electronics Engineer, Software Engineer
Salary/Wage Range or Industry Benchmark: 100000 - 125000 USD Yearly USD 100000.00 125000.00 YEAR
Job Description & How to Apply Below

Description

Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on space‑based mission processing capabilities at the edge. This position will help our team evolve ground‑based mission processing applications of remote sensing payloads onto flight hardware for onboard mission processing operations. In this role, the FPGA Design Engineer will be responsible for leveraging the Vivado Design Suite, the Vitis development platform (including High‑Level Synthesis), and hardware design languages VHDL and Verilog to deploy processing code and algorithms onto flight hardware.

This position will work alongside research scientists, software engineers, and other FPGA engineers on the APEX (Advanced Programs and Exploitation) team.

Responsibilities
  • Develop an understanding of mission processing code written in C++ and implement for hardware processing.
  • Develop, integrate, and test processor subsystem features and interfaces in FPGA hardware.
  • Generate requirements, create FPGA code, and support test bench development.
  • Contribute to FPGA development workflows using both traditional RTL design and High‑Level Synthesis methodologies within the Vitis platform.
Basic Qualifications
  • Bachelor of Science or higher from an accredited college in Electrical Engineering, Computer Engineering or related discipline, or equivalent experience/combined education.
  • Ability to obtain a TS/SCI Clearance required for this role.
  • Understanding of HDL Languages (VHDL & Verilog).
  • Experience designing with Vivado.
Desired Skills
  • Experience with Xilinx Vitis platform, including High‑Level Synthesis (HLS) for FPGA development.
  • Proficient in Matlab & C++.
  • Digital logic design experience.
  • Experience interfacing FPGAs with processors.
  • Experience with Vitis Model Composer.
  • Experience with Matlab HDL Coder.
  • Familiarity with Xilinx platforms and tools.
  • Knowledge of FPGA concepts like clock domains, memory hierarchies, and routing.
  • Experience with embedded software development.
  • Familiarity with embedded Linux environments (e.g., Yocto).
Security Clearance

This position requires a government security clearance; you must be a U.S. Citizen for consideration. Clearance Level: TS/SCI.

Location

Ball Boulder, Colorado. The offices feature a collaborative and modern agile workspace.

Benefits

Medical, Dental, Vision, Life Insurance, Short‑Term Disability, Long‑Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays.

Employment Details

Type:
Full Time. Shift: First. Experience Level: Experienced Professional. Business Unit: SPACE. Relocation Available:
Possible. Career Area:
Electrical Engineering. Type:
Full‑Time.

EEO Statement

Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics.

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